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authorEric Christopher <echristo@redhat.com>2004-06-23 05:54:21 +0000
committerEric Christopher <echristo@gcc.gnu.org>2004-06-23 05:54:21 +0000
commitf241bf89479214a544e12446b52eb9d89869aebe (patch)
tree66cda118bdff6ebf53aa27683128e087c5db9e99 /gcc
parent649b2789d1a5e18be4bc10e1c35d81b405cf2b05 (diff)
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rs6000.md (*insvsi_internal5/6): New patterns.
2004-06-22 Eric Christopher <echristo@redhat.com> * config/rs6000/rs6000.md (*insvsi_internal5/6): New patterns. From-SVN: r83538
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog4
-rw-r--r--gcc/config/rs6000/rs6000.md59
2 files changed, 51 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 70fe4ee..b4e46c6 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2004-06-22 Eric Christopher <echristo@redhat.com>
+
+ * config/rs6000/rs6000.md (*insvsi_internal5/6): New patterns.
+
2004-06-22 Pat Haugen <pthaugen@us.ibm.com>
* cfghooks.c (make_forwarder_block): Decrement count on fallthru edge
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 86b93d3..af8551b 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -3036,6 +3036,45 @@
}"
[(set_attr "type" "insert_word")])
+;; combine patterns for rlwimi
+(define_insn "*insvsi_internal5"
+ [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
+ (ior:SI (and:SI (match_operand:SI 4 "gpc_reg_operand" "0")
+ (match_operand:SI 1 "mask_operand" "i"))
+ (and:SI (lshiftrt:SI (match_operand:SI 3 "gpc_reg_operand" "r")
+ (match_operand:SI 2 "const_int_operand" "i"))
+ (match_operand:SI 5 "mask_operand" "i"))))]
+ "TARGET_POWERPC && INTVAL(operands[1]) == ~INTVAL(operands[5])"
+ "*
+{
+ int me = extract_ME(operands[5]);
+ int mb = extract_MB(operands[5]);
+ operands[4] = GEN_INT(32 - INTVAL(operands[2]));
+ operands[2] = GEN_INT(mb);
+ operands[1] = GEN_INT(me);
+ return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\";
+}"
+ [(set_attr "type" "insert_word")])
+
+(define_insn "*insvsi_internal6"
+ [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
+ (ior:SI (and:SI (lshiftrt:SI (match_operand:SI 3 "gpc_reg_operand" "r")
+ (match_operand:SI 2 "const_int_operand" "i"))
+ (match_operand:SI 5 "mask_operand" "i"))
+ (and:SI (match_operand:SI 4 "gpc_reg_operand" "0")
+ (match_operand:SI 1 "mask_operand" "i"))))]
+ "TARGET_POWERPC && INTVAL(operands[1]) == ~INTVAL(operands[5])"
+ "*
+{
+ int me = extract_ME(operands[5]);
+ int mb = extract_MB(operands[5]);
+ operands[4] = GEN_INT(32 - INTVAL(operands[2]));
+ operands[2] = GEN_INT(mb);
+ operands[1] = GEN_INT(me);
+ return \"{rlimi|rlwimi} %0,%3,%h4,%h2,%h1\";
+}"
+ [(set_attr "type" "insert_word")])
+
(define_insn "insvdi"
[(set (zero_extract:DI (match_operand:DI 0 "gpc_reg_operand" "+r")
(match_operand:SI 1 "const_int_operand" "i")
@@ -8051,13 +8090,11 @@
else
return \"mr %0,%1\;mr %L0,%L1\";
case 1:
- if (GET_CODE (operands[1]) == MEM
- && (rs6000_legitimate_offset_address_p (DFmode, XEXP (operands[1], 0),
- reload_completed || reload_in_progress)
- || GET_CODE (XEXP (operands[1], 0)) == REG
- || GET_CODE (XEXP (operands[1], 0)) == LO_SUM
+ if (offsettable_memref_p (operands[1])
+ || (GET_CODE (operands[1]) == MEM
+ && (GET_CODE (XEXP (operands[1], 0)) == LO_SUM
|| GET_CODE (XEXP (operands[1], 0)) == PRE_INC
- || GET_CODE (XEXP (operands[1], 0)) == PRE_DEC))
+ || GET_CODE (XEXP (operands[1], 0)) == PRE_DEC)))
{
/* If the low-address word is used in the address, we must load
it last. Otherwise, load it first. Note that we cannot have
@@ -8093,13 +8130,11 @@
}
}
case 2:
- if (GET_CODE (operands[0]) == MEM
- && (rs6000_legitimate_offset_address_p (DFmode, XEXP (operands[0], 0),
- reload_completed || reload_in_progress)
- || GET_CODE (XEXP (operands[0], 0)) == REG
- || GET_CODE (XEXP (operands[0], 0)) == LO_SUM
+ if (offsettable_memref_p (operands[0])
+ || (GET_CODE (operands[0]) == MEM
+ && (GET_CODE (XEXP (operands[0], 0)) == LO_SUM
|| GET_CODE (XEXP (operands[0], 0)) == PRE_INC
- || GET_CODE (XEXP (operands[0], 0)) == PRE_DEC))
+ || GET_CODE (XEXP (operands[0], 0)) == PRE_DEC)))
return \"{st%U0|stw%U0} %1,%0\;{st|stw} %L1,%L0\";
else
{