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| author | Chen Liqin <liqin.chen@sunplusct.com> | 2008-12-01 08:47:26 +0000 |
|---|---|---|
| committer | Chen Liqin <liqin@gcc.gnu.org> | 2008-12-01 08:47:26 +0000 |
| commit | e8ddcbf9c9ccb37a62a542e07c92540180d6d7c6 (patch) | |
| tree | c5756e16011cb39d215ce9a52cd45b22860e7d28 /gcc | |
| parent | df72d7edbebecc77c8e7a6a4013c3109de88d56b (diff) | |
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score.h (IRA_COVER_CLASSES): Define.
2008-12-01 Chen Liqin <liqin.chen@sunplusct.com>
* config/score/score.h (IRA_COVER_CLASSES): Define.
From-SVN: r142307
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/score/score.h | 12 |
2 files changed, 16 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5602b5a..feb2d26 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2008-12-01 Chen Liqin <liqin.chen@sunplusct.com> + + * config/score/score.h (IRA_COVER_CLASSES): Define. + 2008-11-30 Eric Botcazou <ebotcazou@adacore.com> PR target/38287 diff --git a/gcc/config/score/score.h b/gcc/config/score/score.h index d9900a5..7f09feb 100644 --- a/gcc/config/score/score.h +++ b/gcc/config/score/score.h @@ -438,6 +438,18 @@ enum reg_class also contains the register. */ #define REGNO_REG_CLASS(REGNO) score_reg_class (REGNO) +/* The following macro defines cover classes for Integrated Register + Allocator. Cover classes is a set of non-intersected register + classes covering all hard registers used for register allocation + purpose. Any move between two registers of a cover class should be + cheaper than load or store of the registers. The macro value is + array of register classes with LIM_REG_CLASSES used as the end + marker. */ +#define IRA_COVER_CLASSES \ +{ \ + G32_REGS, CE_REGS, SP_REGS, LIM_REG_CLASSES \ +} + /* A macro whose definition is the name of the class to which a valid base register must belong. A base register is one used in an address which is the register value plus a displacement. */ |