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| author | Yuri Rumyantsev <ysrumyan@gmail.com> | 2013-11-22 16:33:40 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl@gcc.gnu.org> | 2013-11-22 08:33:40 -0800 |
| commit | e52876717c40ad1cc617dd78eb899ea0e063e1e3 (patch) | |
| tree | a760f4ed61688178cf3708e4f222c9c72af4176c /gcc | |
| parent | 861c1d8ed51db66c8e7e1d562bc94a79eb0d52cd (diff) | |
| download | gcc-e52876717c40ad1cc617dd78eb899ea0e063e1e3.zip gcc-e52876717c40ad1cc617dd78eb899ea0e063e1e3.tar.gz gcc-e52876717c40ad1cc617dd78eb899ea0e063e1e3.tar.bz2 | |
Enable AES, PCLMUL and RDRND for Silvermont
gcc/
2013-11-22 Yuri Rumyantsev <ysrumyan@gmail.com>
* config/i386/i386.c(processor_alias_table): Enable PTA_AES,
PTA_PCLMUL and PTA_RDRND for Silvermont.
* config/i386/driver-i386.c (host_detect_local_cpu): Set up cpu
for Silvermont.
* doc/invoke.texi: Mention AES, PCLMUL and RDRND for Silvermont.
libgcc/
2013-11-22 Yuri Rumyantsev <ysrumyan@gmail.com>
* config/i386/cpuinfo.c (get_intel_cpu): Add Silvermont cases.
From-SVN: r205275
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/config/i386/driver-i386.c | 5 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 4 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 2 |
4 files changed, 17 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4a5c9a1..8150db9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2013-11-22 Yuri Rumyantsev <ysrumyan@gmail.com> + + * config/i386/i386.c(processor_alias_table): Enable PTA_AES, + PTA_PCLMUL and PTA_RDRND for Silvermont. + * config/i386/driver-i386.c (host_detect_local_cpu): Set up cpu + for Silvermont. + + * doc/invoke.texi: Mention AES, PCLMUL and RDRND for Silvermont. + 2013-11-22 Andrew MacLeod <amacleod@redhat.com> * hooks.h (hook_uint_mode_0): Add Prototype. diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c index a4a1f40..0b8af3f 100644 --- a/gcc/config/i386/driver-i386.c +++ b/gcc/config/i386/driver-i386.c @@ -646,6 +646,11 @@ const char *host_detect_local_cpu (int argc, const char **argv) /* Atom. */ cpu = "atom"; break; + case 0x37: + case 0x4d: + /* Silvermont. */ + cpu = "slm"; + break; case 0x0f: /* Merom. */ case 0x17: diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 3f967e5..3c516f4 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -3147,8 +3147,8 @@ ix86_option_override_internal (bool main_args_p, | PTA_SSSE3 | PTA_CX16 | PTA_MOVBE | PTA_FXSR}, {"slm", PROCESSOR_SLM, CPU_SLM, PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3 - | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_POPCNT | PTA_MOVBE - | PTA_FXSR}, + | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_POPCNT | PTA_AES + | PTA_PCLMUL | PTA_RDRND | PTA_MOVBE | PTA_FXSR}, {"geode", PROCESSOR_GEODE, CPU_GEODE, PTA_MMX | PTA_3DNOW | PTA_3DNOW_A | PTA_PREFETCH_SSE | PTA_PRFCHW}, {"k6", PROCESSOR_K6, CPU_K6, PTA_MMX}, diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 6adfc98..7048b0b 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -14535,7 +14535,7 @@ instruction set support. @item slm Intel Silvermont CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, -SSE4.1, SSE4.2 and POPCNT instruction set support. +SSE4.1, SSE4.2, POPCNT, AES, PCLMUL and RDRND instruction set support. @item k6 AMD K6 CPU with MMX instruction set support. |