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| author | GCC Administrator <gccadmin@gcc.gnu.org> | 2022-11-26 00:17:08 +0000 |
|---|---|---|
| committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2022-11-26 00:17:08 +0000 |
| commit | d769c5040874bf9546f2524f3f1d2a894165f92a (patch) | |
| tree | a11e54418c77b3adf07ed450d232abd31faf10f5 /gcc | |
| parent | 309e2d95e3b930c6f15c8a5346b913158404c76d (diff) | |
| download | gcc-d769c5040874bf9546f2524f3f1d2a894165f92a.zip gcc-d769c5040874bf9546f2524f3f1d2a894165f92a.tar.gz gcc-d769c5040874bf9546f2524f3f1d2a894165f92a.tar.bz2 | |
Daily bump.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 33 | ||||
| -rw-r--r-- | gcc/DATESTAMP | 2 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 20 |
3 files changed, 54 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5d7a95a..f999e2c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,36 @@ +2022-11-25 Sandra Loosemore <sandra@codesourcery.com> + + * common.opt (fopenmp-target-simd-clone): New option. + (target_simd_clone_device): New enum to go with it. + * doc/invoke.texi (-fopenmp-target-simd-clone): Document. + * flag-types.h (enum omp_target_simd_clone_device_kind): New. + * omp-simd-clone.cc (auto_simd_fail): New function. + (auto_simd_check_stmt): New function. + (plausible_type_for_simd_clone): New function. + (ok_for_auto_simd_clone): New function. + (simd_clone_create): Add force_local argument, make the symbol + have internal linkage if it is true. + (expand_simd_clones): Also check for cloneable functions with + "omp declare target". Pass explicit_p argument to + simd_clone.compute_vecsize_and_simdlen target hook. + * opts.cc (default_options_table): Add -fopenmp-target-simd-clone. + * target.def (TARGET_SIMD_CLONE_COMPUTE_VECSIZE_AND_SIMDLEN): + Add bool explicit_p argument. + * doc/tm.texi: Regenerated. + * config/aarch64/aarch64.cc + (aarch64_simd_clone_compute_vecsize_and_simdlen): Update. + * config/gcn/gcn.cc + (gcn_simd_clone_compute_vecsize_and_simdlen): Update. + * config/i386/i386.cc + (ix86_simd_clone_compute_vecsize_and_simdlen): Update. + +2022-11-25 Tamar Christina <tamar.christina@arm.com> + + PR target/107830 + * config/aarch64/aarch64.cc + (aarch64_vectorize_can_special_div_by_constant): Check validity during + codegen phase as well. + 2022-11-25 Eric Botcazou <ebotcazou@adacore.com> * range-op.cc (operator_bitwise_xor::op1_range): Fix thinko. diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 9fb0405..ba37858 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20221125 +20221126 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index a43b6ff..f664bda 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,23 @@ +2022-11-25 Sandra Loosemore <sandra@codesourcery.com> + + * g++.dg/gomp/target-simd-clone-1.C: New. + * g++.dg/gomp/target-simd-clone-2.C: New. + * gcc.dg/gomp/target-simd-clone-1.c: New. + * gcc.dg/gomp/target-simd-clone-2.c: New. + * gcc.dg/gomp/target-simd-clone-3.c: New. + * gcc.dg/gomp/target-simd-clone-4.c: New. + * gcc.dg/gomp/target-simd-clone-5.c: New. + * gcc.dg/gomp/target-simd-clone-6.c: New. + * gcc.dg/gomp/target-simd-clone-7.c: New. + * gcc.dg/gomp/target-simd-clone-8.c: New. + * lib/scanoffloadipa.exp: New. + +2022-11-25 Tamar Christina <tamar.christina@arm.com> + + PR target/107830 + * gcc.target/aarch64/sve2/pr107830-1.c: New test. + * gcc.target/aarch64/sve2/pr107830-2.c: New test. + 2022-11-25 Eric Botcazou <ebotcazou@adacore.com> * gnat.dg/opt100.adb: New test. |