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authorJakub Jelinek <jakub@gcc.gnu.org>2004-07-08 17:58:22 +0200
committerJakub Jelinek <jakub@gcc.gnu.org>2004-07-08 17:58:22 +0200
commitc618c6ec7e797b5aa69218b86cd643bb65c0c48a (patch)
treeceb3967dbf08a732475f57723332634514a7ec6a /gcc
parent75f29cdded521da42f6b3a8d790371203d833664 (diff)
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[multiple changes]
2004-07-08 Paolo Bonzini <bonzini@gnu.org> Jakub Jelinek <jakub@redhat.com> * config/i386/i386.c (override_options): Enable SSE prefetches with -mtune, as long as we are compiling for i686 or higher. All i686 processors accept SSE prefetches as NOPS, some i586's don't. 2004-07-08 Jakub Jelinek <jakub@redhat.com> * gcc.mist-tests/i386-prefetch.exp (PREFETCH_SSE): Change all -march=i386 into -march=i686. Add -march=i686 -mtune=x and -march=x for pentium3, pentium3m, pentium-m, pentium4m, prescott and c3-2. (PREFETCH_3DNOW): Add -march=c3. From-SVN: r84297
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog8
-rw-r--r--gcc/config/i386/i386.c8
-rw-r--r--gcc/testsuite/ChangeLog8
-rw-r--r--gcc/testsuite/gcc.misc-tests/i386-prefetch.exp23
4 files changed, 41 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b259f42..ec20053 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2004-07-08 Paolo Bonzini <bonzini@gnu.org>
+ Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/i386.c (override_options): Enable
+ SSE prefetches with -mtune, as long as we are
+ compiling for i686 or higher. All i686 processors
+ accept SSE prefetches as NOPS, some i586's don't.
+
2004-07-08 Eric Botcazou <ebotcazou@libertysurf.fr>
PR target/10567
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index b51586f..b468e1d 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -1306,6 +1306,14 @@ override_options (void)
ix86_tune = processor_alias_table[i].processor;
if (TARGET_64BIT && !(processor_alias_table[i].flags & PTA_64BIT))
error ("CPU you selected does not support x86-64 instruction set");
+
+ /* Intel CPUs have always interpreted SSE prefetch instructions as
+ NOPs; so, we can enable SSE prefetch instructions even when
+ -mtune (rather than -march) points us to a processor that has them.
+ However, the VIA C3 gives a SIGILL, so we only do that for i686 and
+ higher processors. */
+ if (TARGET_CMOVE && (processor_alias_table[i].flags & PTA_PREFETCH_SSE))
+ x86_prefetch_sse = true;
break;
}
if (i == pta_size)
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index d522c8e..827198d 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2004-07-08 Jakub Jelinek <jakub@redhat.com>
+
+ * gcc.mist-tests/i386-prefetch.exp (PREFETCH_SSE): Change all
+ -march=i386 into -march=i686. Add -march=i686 -mtune=x and
+ -march=x for pentium3, pentium3m, pentium-m, pentium4m,
+ prescott and c3-2.
+ (PREFETCH_3DNOW): Add -march=c3.
+
2004-07-08 Diego Novillo <dnovillo@redhat.com>
PR c/16437
diff --git a/gcc/testsuite/gcc.misc-tests/i386-prefetch.exp b/gcc/testsuite/gcc.misc-tests/i386-prefetch.exp
index 2290478..25a752a 100644
--- a/gcc/testsuite/gcc.misc-tests/i386-prefetch.exp
+++ b/gcc/testsuite/gcc.misc-tests/i386-prefetch.exp
@@ -1,4 +1,4 @@
-# Copyright (C) 2002 Free Software Foundation, Inc.
+# Copyright (C) 2002, 2004 Free Software Foundation, Inc.
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
@@ -46,16 +46,27 @@ set PREFETCH_NONE [list \
# instructions as nops.
set PREFETCH_SSE [list \
- { -march=i386 -mtune=pentium3 } \
- { -march=i386 -mtune=pentium4 } \
- { -march=i386 -mtune=athlon } \
- { -march=i386 -mtune=athlon-4 } \
+ { -march=i686 -mtune=pentium3 } \
+ { -march=i686 -mtune=pentium3m } \
+ { -march=i686 -mtune=pentium-m } \
+ { -march=i686 -mtune=pentium4 } \
+ { -march=i686 -mtune=pentium4m } \
+ { -march=i686 -mtune=prescott } \
+ { -march=i686 -mtune=athlon } \
+ { -march=i686 -mtune=athlon-4 } \
+ { -march=i686 -mtune=c3-2 } \
{ -march=pentium3 } \
- { -march=pentium4 } ]
+ { -march=pentium3m } \
+ { -march=pentium-m } \
+ { -march=pentium4 } \
+ { -march=pentium4m } \
+ { -march=prescott } \
+ { -march=c3-2 } ]
# Generate 3DNow! prefetch instructions for the following.
set PREFETCH_3DNOW [list \
+ { -march=c3 } \
{ -march=k6-2 } \
{ -march=k6-3 } ]