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| author | Matthew Malcomson <matthew.malcomson@arm.com> | 2018-08-29 08:22:19 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2018-08-29 08:22:19 +0000 |
| commit | aac8c550c9390ac4808246451989f0655ed17c7e (patch) | |
| tree | 44535bd9886322da32b903123000e052d3f9789a /gcc | |
| parent | 95f0c81630e237f4f42ae6ae6eac73af3f96da5b (diff) | |
| download | gcc-aac8c550c9390ac4808246451989f0655ed17c7e.zip gcc-aac8c550c9390ac4808246451989f0655ed17c7e.tar.gz gcc-aac8c550c9390ac4808246451989f0655ed17c7e.tar.bz2 | |
[AARCH64] Use stdint integers in vect_su_add_sub.c
2018-08-29 Matthew Malcomson <matthew.malcomson@arm.com>
* gcc.target/aarch64/simd/vect_su_add_sub.c: Use 32 and 64-bit types
where appropriate.
From-SVN: r263946
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/simd/vect_su_add_sub.c | 26 |
2 files changed, 21 insertions, 10 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 765d4a1..bd9d31a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2018-08-29 Matthew Malcomson <matthew.malcomson@arm.com> + + * gcc.target/aarch64/simd/vect_su_add_sub.c: Use 32 and 64-bit types + where appropriate. + 2018-08-29 Richard Biener <rguenther@suse.de> PR tree-optimization/87117 diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vect_su_add_sub.c b/gcc/testsuite/gcc.target/aarch64/simd/vect_su_add_sub.c index 338da54..921c5f1 100644 --- a/gcc/testsuite/gcc.target/aarch64/simd/vect_su_add_sub.c +++ b/gcc/testsuite/gcc.target/aarch64/simd/vect_su_add_sub.c @@ -1,21 +1,27 @@ /* { dg-do compile } */ /* { dg-options "-O3" } */ +typedef int __attribute__ ((mode (SI))) int32_t; +typedef int __attribute__ ((mode (DI))) int64_t; +typedef unsigned __attribute__ ((mode (SI))) size_t; +typedef unsigned __attribute__ ((mode (SI))) uint32_t; +typedef unsigned __attribute__ ((mode (DI))) uint64_t; + /* Ensure we use the signed/unsigned extend vectorized add and sub instructions. */ #define N 1024 -int a[N]; -long c[N]; -long d[N]; -unsigned int ua[N]; -unsigned long uc[N]; -unsigned long ud[N]; +int32_t a[N]; +int64_t c[N]; +int64_t d[N]; +uint32_t ua[N]; +uint64_t uc[N]; +uint64_t ud[N]; void add () { - for (int i = 0; i < N; i++) + for (size_t i = 0; i < N; i++) d[i] = a[i] + c[i]; } /* { dg-final { scan-assembler-times "\[ \t\]saddw2\[ \t\]+" 1 } } */ @@ -24,7 +30,7 @@ add () void subtract () { - for (int i = 0; i < N; i++) + for (size_t i = 0; i < N; i++) d[i] = c[i] - a[i]; } /* { dg-final { scan-assembler-times "\[ \t\]ssubw2\[ \t\]+" 1 } } */ @@ -33,7 +39,7 @@ subtract () void uadd () { - for (int i = 0; i < N; i++) + for (size_t i = 0; i < N; i++) ud[i] = ua[i] + uc[i]; } /* { dg-final { scan-assembler-times "\[ \t\]uaddw2\[ \t\]+" 1 } } */ @@ -42,7 +48,7 @@ uadd () void usubtract () { - for (int i = 0; i < N; i++) + for (size_t i = 0; i < N; i++) ud[i] = uc[i] - ua[i]; } /* { dg-final { scan-assembler-times "\[ \t\]usubw2\[ \t\]+" 1 } } */ |