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authorNick Clifton <nickc@cygnus.com>1998-10-16 11:03:50 +0000
committerNick Clifton <nickc@gcc.gnu.org>1998-10-16 11:03:50 +0000
commita39f6bb0fde140468e20eb65d0462ff03d984421 (patch)
tree11e71e0fbfb5fdf4bba39a56110489ce704bfe53 /gcc
parentc2861502f7a27cdbfa704f4495fe2e14b586dea7 (diff)
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Add --help documentation for ARM specific command line switches
From-SVN: r23130
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/arm/arm.h34
2 files changed, 22 insertions, 17 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6899cf8..0a29188 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+Fri Oct 16 10:47:53 1998 Nick Clifton <nickc@cygnus.com>
+
+ * config/arm/arm.h (TARGET_SWITCHES): Add --help documentation.
+ (TARGET_OPTIONS): Add --help documentation.
+
Fri Oct 16 11:49:01 1998 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* rtl.h (sets_cc0_p): Revert Oct 14 ATTRIBUTE_NORETURN change.
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index ed5e4de..c9127e7 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -332,42 +332,42 @@ extern char *target_fp_name;
#define TARGET_SWITCHES \
{ \
{"apcs", ARM_FLAG_APCS_FRAME}, \
- {"apcs-frame", ARM_FLAG_APCS_FRAME}, \
+ {"apcs-frame", ARM_FLAG_APCS_FRAME, "Generate APCS conformant stack frames" }, \
{"no-apcs-frame", -ARM_FLAG_APCS_FRAME}, \
{"poke-function-name", ARM_FLAG_POKE}, \
{"fpe", ARM_FLAG_FPE}, \
{"6", ARM_FLAG_ARM6}, \
{"2", ARM_FLAG_ARM3}, \
{"3", ARM_FLAG_ARM3}, \
- {"apcs-32", ARM_FLAG_APCS_32}, \
- {"apcs-26", -ARM_FLAG_APCS_32}, \
+ {"apcs-32", ARM_FLAG_APCS_32, "Use the 32bit version of the APCS" }, \
+ {"apcs-26", -ARM_FLAG_APCS_32, "Use the 26bit version of the APCS" }, \
{"apcs-stack-check", ARM_FLAG_APCS_STACK}, \
{"no-apcs-stack-check", -ARM_FLAG_APCS_STACK}, \
- {"apcs-float", ARM_FLAG_APCS_FLOAT}, \
+ {"apcs-float", ARM_FLAG_APCS_FLOAT, "Pass FP arguments in FP registers" }, \
{"no-apcs-float", -ARM_FLAG_APCS_FLOAT}, \
- {"apcs-reentrant", ARM_FLAG_APCS_REENT}, \
+ {"apcs-reentrant", ARM_FLAG_APCS_REENT, "Generate re-entrant, PIC code" }, \
{"no-apcs-reentrant", -ARM_FLAG_APCS_REENT}, \
- {"short-load-bytes", ARM_FLAG_SHORT_BYTE}, \
+ {"short-load-bytes", ARM_FLAG_SHORT_BYTE, "Load shorts a byte at a time" }, \
{"no-short-load-bytes", -ARM_FLAG_SHORT_BYTE}, \
- {"short-load-words", -ARM_FLAG_SHORT_BYTE}, \
+ {"short-load-words", -ARM_FLAG_SHORT_BYTE, "Load words a byte at a time" }, \
{"no-short-load-words", ARM_FLAG_SHORT_BYTE}, \
- {"soft-float", ARM_FLAG_SOFT_FLOAT}, \
- {"hard-float", -ARM_FLAG_SOFT_FLOAT}, \
- {"big-endian", ARM_FLAG_BIG_END}, \
- {"little-endian", -ARM_FLAG_BIG_END}, \
- {"thumb-interwork", ARM_FLAG_THUMB}, \
+ {"soft-float", ARM_FLAG_SOFT_FLOAT, "Use library calls to perform FP operations" }, \
+ {"hard-float", -ARM_FLAG_SOFT_FLOAT, "Use hardware floating point instructions" }, \
+ {"big-endian", ARM_FLAG_BIG_END, "Assume target CPU is configured as big endian" }, \
+ {"little-endian", -ARM_FLAG_BIG_END, "Assume target CPU is configured as little endian" }, \
+ {"words-little-endian", ARM_FLAG_LITTLE_WORDS, "Assume big endian bytes, little endian words" }, \
+ {"thumb-interwork", ARM_FLAG_THUMB, "Support calls between THUMB and ARM instructions sets" }, \
{"no-thumb-interwork", -ARM_FLAG_THUMB}, \
- {"words-little-endian", ARM_FLAG_LITTLE_WORDS}, \
SUBTARGET_SWITCHES \
{"", TARGET_DEFAULT } \
}
#define TARGET_OPTIONS \
{ \
- {"cpu=", &arm_select[1].string}, \
- {"arch=", &arm_select[2].string}, \
- {"tune=", &arm_select[3].string}, \
- {"fp=", &target_fp_name} \
+ {"cpu=", & arm_select[1].string, "Specify the name of the target CPU" }, \
+ {"arch=", & arm_select[2].string, "Specify the name of the target architecture" }, \
+ {"tune=", & arm_select[3].string}, \
+ {"fp=", & target_fp_name, "Specify the version of the floating point emulator"} \
}
/* arm_select[0] is reserved for the default cpu. */