i386.c (ix86_save_reg): Make regno unsigned.

        * config/i386/i386.c (ix86_save_reg): Make regno unsigned.
        (ix86_safe_length, ix86_safe_length_prefix, ix86_safe_memory): Kill.

From-SVN: r53464

2 files changed, 38 insertions, 66 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 66186b5..3262b5d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,6 +1,10 @@
+2002-05-14  Richard Henderson  <rth@redhat.com>
+
+	* config/i386/i386.c (ix86_save_reg): Make regno unsigned.
+	(ix86_safe_length, ix86_safe_length_prefix, ix86_safe_memory): Kill.
+
 2002-05-14  Neil Booth  <neil@daikokuya.demon.co.uk>
 
-config:
 	* arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define.
 	(CPP_SPEC): Update.
 	(CPP_APCS_PC_SPEC, CPP_APCS_PC_DEFAULT_SPEC,
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 245ed77..9c328b7 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -44,35 +44,6 @@ Boston, MA 02111-1307, USA.  */
 #include "target-def.h"
 #include "langhooks.h"
 
-static int ia32_use_dfa_pipeline_interface PARAMS ((void));
-static int ia32_multipass_dfa_lookahead PARAMS ((void));
-
-#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE 
-#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE ia32_use_dfa_pipeline_interface
-#undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
-#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD ia32_multipass_dfa_lookahead
-
-static int
-ia32_use_dfa_pipeline_interface ()
-{
-  if (ix86_cpu == PROCESSOR_PENTIUM)
-    return 1;
-  return 0;
-}
-
-/* How many alternative schedules to try.  This should be as wide as the
-   scheduling freedom in the DFA, but no wider.  Making this value too
-   large results extra work for the scheduler.  */
-
-static int
-ia32_multipass_dfa_lookahead ()
-{
-  if (ix86_cpu == PROCESSOR_PENTIUM)
-    return 2;
-  else
-   return 0;
-}
-
 #ifndef CHECK_STACK_LIMIT
 #define CHECK_STACK_LIMIT (-1)
 #endif
@@ -686,8 +657,6 @@ static rtx gen_push PARAMS ((rtx));
 static int memory_address_length PARAMS ((rtx addr));
 static int ix86_flags_dependant PARAMS ((rtx, rtx, enum attr_type));
 static int ix86_agi_dependant PARAMS ((rtx, rtx, enum attr_type));
-static int ix86_safe_length PARAMS ((rtx));
-static enum attr_memory ix86_safe_memory PARAMS ((rtx));
 static enum attr_ppro_uops ix86_safe_ppro_uops PARAMS ((rtx));
 static void ix86_dump_ppro_packet PARAMS ((FILE *));
 static void ix86_reorder_insn PARAMS ((rtx *, rtx *));
@@ -695,7 +664,6 @@ static void ix86_init_machine_status PARAMS ((struct function *));
 static void ix86_mark_machine_status PARAMS ((struct function *));
 static void ix86_free_machine_status PARAMS ((struct function *));
 static int ix86_split_to_parts PARAMS ((rtx, rtx *, enum machine_mode));
-static int ix86_safe_length_prefix PARAMS ((rtx));
 static int ix86_nsaved_regs PARAMS ((void));
 static void ix86_emit_save_regs PARAMS ((void));
 static void ix86_emit_save_regs_using_mov PARAMS ((rtx, HOST_WIDE_INT));
@@ -711,6 +679,8 @@ static int ix86_adjust_cost PARAMS ((rtx, rtx, rtx, int));
 static void ix86_sched_init PARAMS ((FILE *, int, int));
 static int ix86_sched_reorder PARAMS ((FILE *, int, rtx *, int *, int));
 static int ix86_variable_issue PARAMS ((FILE *, int, rtx, int));
+static int ia32_use_dfa_pipeline_interface PARAMS ((void));
+static int ia32_multipass_dfa_lookahead PARAMS ((void));
 static void ix86_init_mmx_sse_builtins PARAMS ((void));
 
 struct ix86_address
@@ -744,7 +714,7 @@ static int ix86_fp_comparison_arithmetics_cost PARAMS ((enum rtx_code code));
 static int ix86_fp_comparison_fcomi_cost PARAMS ((enum rtx_code code));
 static int ix86_fp_comparison_sahf_cost PARAMS ((enum rtx_code code));
 static int ix86_fp_comparison_cost PARAMS ((enum rtx_code code));
-static int ix86_save_reg PARAMS ((int, int));
+static int ix86_save_reg PARAMS ((unsigned int, int));
 static void ix86_compute_frame_layout PARAMS ((struct ix86_frame *));
 static int ix86_comp_type_attributes PARAMS ((tree, tree));
 const struct attribute_spec ix86_attribute_table[];
@@ -845,6 +815,12 @@ static enum x86_64_reg_class merge_classes PARAMS ((enum x86_64_reg_class,
 #define TARGET_SCHED_INIT ix86_sched_init
 #undef TARGET_SCHED_REORDER
 #define TARGET_SCHED_REORDER ix86_sched_reorder
+#undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE 
+#define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE \
+  ia32_use_dfa_pipeline_interface
+#undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
+#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD \
+  ia32_multipass_dfa_lookahead
 
 struct gcc_target targetm = TARGET_INITIALIZER;
 
@@ -3914,7 +3890,7 @@ gen_push (arg)
 /* Return 1 if we need to save REGNO.  */
 static int
 ix86_save_reg (regno, maybe_eh_return)
-     int regno;
+     unsigned int regno;
      int maybe_eh_return;
 {
   if (regno == PIC_OFFSET_TABLE_REGNUM
@@ -3931,7 +3907,7 @@ ix86_save_reg (regno, maybe_eh_return)
 	  unsigned test = EH_RETURN_DATA_REGNO (i);
 	  if (test == INVALID_REGNUM)
 	    break;
-	  if (test == (unsigned) regno)
+	  if (test == regno)
 	    return 1;
 	}
     }
@@ -10302,36 +10278,6 @@ static union
   } ppro;
 } ix86_sched_data;
 
-static int
-ix86_safe_length (insn)
-     rtx insn;
-{
-  if (recog_memoized (insn) >= 0)
-    return get_attr_length (insn);
-  else
-    return 128;
-}
-
-static int
-ix86_safe_length_prefix (insn)
-     rtx insn;
-{
-  if (recog_memoized (insn) >= 0)
-    return get_attr_length (insn);
-  else
-    return 0;
-}
-
-static enum attr_memory
-ix86_safe_memory (insn)
-     rtx insn;
-{
-  if (recog_memoized (insn) >= 0)
-    return get_attr_memory (insn);
-  else
-    return MEMORY_UNKNOWN;
-}
-
 static enum attr_ppro_uops
 ix86_safe_ppro_uops (insn)
      rtx insn;
@@ -10562,6 +10508,28 @@ ix86_variable_issue (dump, sched_verbose, insn, can_issue_more)
       return --ix86_sched_data.ppro.issued_this_cycle;
     }
 }
+
+static int
+ia32_use_dfa_pipeline_interface ()
+{
+  if (ix86_cpu == PROCESSOR_PENTIUM)
+    return 1;
+  return 0;
+}
+
+/* How many alternative schedules to try.  This should be as wide as the
+   scheduling freedom in the DFA, but no wider.  Making this value too
+   large results extra work for the scheduler.  */
+
+static int
+ia32_multipass_dfa_lookahead ()
+{
+  if (ix86_cpu == PROCESSOR_PENTIUM)
+    return 2;
+  else
+   return 0;
+}
+
 
 /* Walk through INSNS and look for MEM references whose address is DSTREG or
    SRCREG and set the memory attribute to those of DSTREF and SRCREF, as