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| author | Palmer Dabbelt <palmer@rivosinc.com> | 2022-05-25 19:30:55 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-06-21 19:29:27 -0700 |
| commit | 98b6e62cf5e7d477b5797084da59561f6d018668 (patch) | |
| tree | f5dd7a01129d7498b9585779f383a339a1c883f4 /gcc | |
| parent | a33dda016e5acf9c6325ce8a72a1b0238130374e (diff) | |
| download | gcc-98b6e62cf5e7d477b5797084da59561f6d018668.zip gcc-98b6e62cf5e7d477b5797084da59561f6d018668.tar.gz gcc-98b6e62cf5e7d477b5797084da59561f6d018668.tar.bz2 | |
RISC-V: Add -mtune=thead-c906 to the invoke docs
gcc/ChangeLog
* doc/invoke.texi (RISC-V): Document -mtune=thead-c906.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/doc/invoke.texi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 81d13f4..fb50636 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -28164,7 +28164,7 @@ Permissible values for this option are: @samp{sifive-e20}, @samp{sifive-e21}, Optimize the output for the given processor, specified by microarchitecture or particular CPU name. Permissible values for this option are: @samp{rocket}, @samp{sifive-3-series}, @samp{sifive-5-series}, @samp{sifive-7-series}, -@samp{size}, and all valid options for @option{-mcpu=}. +@samp{thead-c906}, @samp{size}, and all valid options for @option{-mcpu=}. When @option{-mtune=} is not specified, use the setting from @option{-mcpu}, the default is @samp{rocket} if both are not specified. |