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authorRichard Kenner <kenner@gcc.gnu.org>1997-05-18 07:48:25 -0400
committerRichard Kenner <kenner@gcc.gnu.org>1997-05-18 07:48:25 -0400
commit9591220667b495ebc8bedd25ce2b159d6d4ab382 (patch)
tree376cbf72de27a65c30ebf892e940d235983b03ea /gcc
parentd96b26312b1cf791ea7ff2a2be471b71e6130947 (diff)
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(movstrict*): Changed into define_expands.
(movstrict*): Changed into define_expands. Split insns into m68k and coldfire specific versions with appropriate constraints. From-SVN: r14080
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/m68k/m68k.md54
1 files changed, 30 insertions, 24 deletions
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index d2e18e7..938b12b 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -958,20 +958,23 @@
"TARGET_5200"
"* return output_move_himode (operands);")
-(define_insn "movstricthi"
+(define_expand "movstricthi"
+ [(set (strict_low_part (match_operand:HI 0 "general_operand" ""))
+ (match_operand:HI 1 "general_operand" ""))]
+ ""
+ "")
+
+(define_insn ""
[(set (strict_low_part (match_operand:HI 0 "general_operand" "+dm"))
(match_operand:HI 1 "general_operand" "rmn"))]
- ""
- "*
-{
- if (operands[1] == const0_rtx
- /* clr insns on 68000 read before writing.
- This isn't so on the 68010, but we have no TARGET_68010. */
- && ((TARGET_68020 || TARGET_5200)
- || !(GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0]))))
- return \"clr%.w %0\";
- return \"move%.w %1,%0\";
-}")
+ "!TARGET_5200"
+ "* return output_move_stricthi (operands);")
+
+(define_insn ""
+ [(set (strict_low_part (match_operand:HI 0 "general_operand" "+d,m"))
+ (match_operand:HI 1 "general_operand" "rmn,r"))]
+ "TARGET_5200"
+ "* return output_move_stricthi (operands);")
(define_expand "movqi"
[(set (match_operand:QI 0 "general_operand" "")
@@ -991,20 +994,23 @@
"TARGET_5200"
"* return output_move_qimode (operands);")
-(define_insn "movstrictqi"
+(define_expand "movstrictqi"
+ [(set (strict_low_part (match_operand:QI 0 "general_operand" ""))
+ (match_operand:QI 1 "general_operand" ""))]
+ ""
+ "")
+
+(define_insn ""
[(set (strict_low_part (match_operand:QI 0 "general_operand" "+dm"))
(match_operand:QI 1 "general_operand" "dmn"))]
- ""
- "*
-{
- if (operands[1] == const0_rtx
- /* clr insns on 68000 read before writing.
- This isn't so on the 68010, but we have no TARGET_68010. */
- && ((TARGET_68020 || TARGET_5200)
- || !(GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0]))))
- return \"clr%.b %0\";
- return \"move%.b %1,%0\";
-}")
+ "!TARGET_5200"
+ "* return output_move_strictqi (operands);")
+
+(define_insn ""
+ [(set (strict_low_part (match_operand:QI 0 "general_operand" "+d,m"))
+ (match_operand:QI 1 "general_operand" "dmn,d"))]
+ "TARGET_5200"
+ "* return output_move_strictqi (operands);")
(define_expand "movsf"
[(set (match_operand:SF 0 "general_operand" "")