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| author | Richard Kenner <kenner@gcc.gnu.org> | 1996-10-28 17:22:21 -0500 |
|---|---|---|
| committer | Richard Kenner <kenner@gcc.gnu.org> | 1996-10-28 17:22:21 -0500 |
| commit | 8a642d97fd65ebd948367a803313ec7ac2c09a03 (patch) | |
| tree | 8cf6cb9d36718dc7ea1a7b9939babefa08e54afb /gcc | |
| parent | 3c9675679a3326ed57d41190ac3f536073500ff8 (diff) | |
| download | gcc-8a642d97fd65ebd948367a803313ec7ac2c09a03.zip gcc-8a642d97fd65ebd948367a803313ec7ac2c09a03.tar.gz gcc-8a642d97fd65ebd948367a803313ec7ac2c09a03.tar.bz2 | |
(emit_move_sequence): If reload in progress, replace reference to
pseudo with reference to corresponding MEM.
From-SVN: r13056
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/pa/pa.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c index 0cffa60..74d7b88 100644 --- a/gcc/config/pa/pa.c +++ b/gcc/config/pa/pa.c @@ -32,6 +32,7 @@ Boston, MA 02111-1307, USA. */ #include "insn-attr.h" #include "flags.h" #include "tree.h" +#include "reload.h" #include "c-tree.h" #include "expr.h" #include "obstack.h" @@ -1059,6 +1060,22 @@ emit_move_sequence (operands, mode, scratch_reg) register rtx operand0 = operands[0]; register rtx operand1 = operands[1]; + if (reload_in_progress && GET_CODE (operand0) == REG + && REGNO (operand0) >= FIRST_PSEUDO_REGISTER) + operand0 = reg_equiv_mem[REGNO (operand0)]; + else if (reload_in_progress && GET_CODE (operand0) == SUBREG + && GET_CODE (SUBREG_REG (operand0)) == REG + && REGNO (SUBREG_REG (operand0)) >= FIRST_PSEUDO_REGISTER) + SUBREG_REG (operand0) = reg_equiv_mem[REGNO (SUBREG_REG (operand0))]; + + if (reload_in_progress && GET_CODE (operand1) == REG + && REGNO (operand1) >= FIRST_PSEUDO_REGISTER) + operand1 = reg_equiv_mem[REGNO (operand1)]; + else if (reload_in_progress && GET_CODE (operand1) == SUBREG + && GET_CODE (SUBREG_REG (operand1)) == REG + && REGNO (SUBREG_REG (operand1)) >= FIRST_PSEUDO_REGISTER) + SUBREG_REG (operand1) = reg_equiv_mem[REGNO (SUBREG_REG (operand1))]; + /* Handle secondary reloads for loads/stores of FP registers from REG+D addresses where D does not fit in 5 bits, including (subreg (mem (addr))) cases. */ |