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author | Uros Bizjak <uros@gcc.gnu.org> | 2009-07-21 17:32:51 +0200 |
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committer | Uros Bizjak <uros@gcc.gnu.org> | 2009-07-21 17:32:51 +0200 |
commit | 848e631716a57a22ed7bf624bdd0e6aa2fedec51 (patch) | |
tree | 53efce656c397848632f83829b61cda9b2e4f248 /gcc | |
parent | 54e86f6b4d2b10be3667d0caf6fb8ccb1c84cee1 (diff) | |
download | gcc-848e631716a57a22ed7bf624bdd0e6aa2fedec51.zip gcc-848e631716a57a22ed7bf624bdd0e6aa2fedec51.tar.gz gcc-848e631716a57a22ed7bf624bdd0e6aa2fedec51.tar.bz2 |
sse.md (vec_unpacku_float_hi_v4si): New expander.
* config/i386/sse.md (vec_unpacku_float_hi_v4si): New expander.
(vec_unpacku_float_lo_v4si): Ditto.
testsuite/ChangeLog:
* gcc.target/i386/vectorize8.c: New test.
From-SVN: r149862
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 12 | ||||
-rw-r--r-- | gcc/config/i386/sse.md | 65 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/vectorize8.c | 16 |
4 files changed, 93 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 369bf14..a62d79f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2009-07-21 Uros Bizjak <ubizjak@gmail.com> + * config/i386/sse.md (vec_unpacku_float_hi_v4si): New expander. + (vec_unpacku_float_lo_v4si): Ditto. + +2009-07-21 Uros Bizjak <ubizjak@gmail.com> + PR target/40811 * config/i386/sse.md (sse2_cvtudq2ps): New expander. (enum ix86_builtins): Add IX86_BUILTIN_CVTUDQ2PS. @@ -39,8 +44,7 @@ 2009-07-20 Olatunji Ruwase <tjruwase@google.com> - * toplev.c: Invoke FINISH_UNIT callbacks before call to - finalize(). + * toplev.c: Invoke FINISH_UNIT callbacks before call to finalize(). 2009-07-20 Shujing Zhao <pearly.zhao@oracle.com> @@ -75,7 +79,7 @@ * tree.c (build_function_type_skip_args): Remove bogus assert. 2009-07-20 Jan Hubicka <jh@suse.cz> - Martin Jambor <mjambor@suse.cz> + Martin Jambor <mjambor@suse.cz> * cgraph.h (combined_args_to_skip): New field. * cgraph.c (cgraph_create_virtual_clone): Properly handle @@ -465,7 +469,7 @@ alias information when not optimizing. 2009-07-14 Richard Guenther <rguenther@suse.de> - Andrey Belevantsev <abel@ispras.ru> + Andrey Belevantsev <abel@ispras.ru> * tree-ssa-alias.h (refs_may_alias_p_1): Declare. (pt_solution_set): Likewise. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index fa910a2..84af375 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -2970,6 +2970,71 @@ (parallel [(const_int 0) (const_int 1)]))))] "TARGET_SSE2") +(define_expand "vec_unpacku_float_hi_v4si" + [(set (match_dup 5) + (vec_select:V4SI + (match_operand:V4SI 1 "nonimmediate_operand" "") + (parallel [(const_int 2) + (const_int 3) + (const_int 2) + (const_int 3)]))) + (set (match_dup 6) + (float:V2DF + (vec_select:V2SI + (match_dup 5) + (parallel [(const_int 0) (const_int 1)])))) + (set (match_dup 7) + (lt:V2DF (match_dup 6) (match_dup 3))) + (set (match_dup 8) + (and:V2DF (match_dup 7) (match_dup 4))) + (set (match_operand:V2DF 0 "register_operand" "") + (plus:V2DF (match_dup 6) (match_dup 8)))] + "TARGET_SSE2" +{ + REAL_VALUE_TYPE TWO32r; + rtx x; + int i; + + real_ldexp (&TWO32r, &dconst1, 32); + x = const_double_from_real_value (TWO32r, DFmode); + + operands[3] = force_reg (V2DFmode, CONST0_RTX (V2DFmode)); + operands[4] = force_reg (V2DFmode, ix86_build_const_vector (DFmode, 1, x)); + + operands[5] = gen_reg_rtx (V4SImode); + + for (i = 6; i < 9; i++) + operands[i] = gen_reg_rtx (V2DFmode); +}) + +(define_expand "vec_unpacku_float_lo_v4si" + [(set (match_dup 5) + (float:V2DF + (vec_select:V2SI + (match_operand:V4SI 1 "nonimmediate_operand" "") + (parallel [(const_int 0) (const_int 1)])))) + (set (match_dup 6) + (lt:V2DF (match_dup 5) (match_dup 3))) + (set (match_dup 7) + (and:V2DF (match_dup 6) (match_dup 4))) + (set (match_operand:V2DF 0 "register_operand" "") + (plus:V2DF (match_dup 5) (match_dup 7)))] + "TARGET_SSE2" +{ + REAL_VALUE_TYPE TWO32r; + rtx x; + int i; + + real_ldexp (&TWO32r, &dconst1, 32); + x = const_double_from_real_value (TWO32r, DFmode); + + operands[3] = force_reg (V2DFmode, CONST0_RTX (V2DFmode)); + operands[4] = force_reg (V2DFmode, ix86_build_const_vector (DFmode, 1, x)); + + for (i = 5; i < 8; i++) + operands[i] = gen_reg_rtx (V2DFmode); +}) + (define_expand "vec_pack_trunc_v2df" [(match_operand:V4SF 0 "register_operand" "") (match_operand:V2DF 1 "nonimmediate_operand" "") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 525e6b2..ed0b13a 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,9 @@ 2009-07-21 Uros Bizjak <ubizjak@gmail.com> + * gcc.target/i386/vectorize8.c: New test. + +2009-07-21 Uros Bizjak <ubizjak@gmail.com> + PR target/40811 * lib/target-supports.exp (check_effective_target_vect_uintfloat_cvt): Add i?86 and x86_64 targets. diff --git a/gcc/testsuite/gcc.target/i386/vectorize8.c b/gcc/testsuite/gcc.target/i386/vectorize8.c new file mode 100644 index 0000000..ed1517b --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/vectorize8.c @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -ftree-vectorize -msse2" } */ + +unsigned int a[256]; +double b[256]; + +void foo(void) +{ + int i; + + for (i=0; i<256; ++i) + b[i] = a[i]; +} + +/* { dg-final { scan-assembler "cvtdq2pd" } } */ + |