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| author | David Edelsohn <edelsohn@gnu.org> | 2005-11-16 15:59:27 +0000 |
|---|---|---|
| committer | David Edelsohn <dje@gcc.gnu.org> | 2005-11-16 10:59:27 -0500 |
| commit | 833126adaf911ad0bacb2c6cdde3844a2c6b2327 (patch) | |
| tree | c17d43e8a7bb3ce4036e30bc924f210bb0efa6c0 /gcc | |
| parent | 0d88914b25756f154732e2bf12b8d37b58ddd2de (diff) | |
| download | gcc-833126adaf911ad0bacb2c6cdde3844a2c6b2327.zip gcc-833126adaf911ad0bacb2c6cdde3844a2c6b2327.tar.gz gcc-833126adaf911ad0bacb2c6cdde3844a2c6b2327.tar.bz2 | |
re PR target/24772 (Lots of ICEs in vrsave_operation_1 while running the testsuite on powerpc)
PR target/24772
* config/rs6000/predicates.md (vrsave_operation): SET_SRC is a VEC.
* config/rs6000/rs6000.md (btruncsf2, ceilsf2, floorsf2,
roundsf2): Remove "s" from mnemonic.
From-SVN: r107085
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/rs6000/predicates.md | 5 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 10 |
3 files changed, 15 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index dc84b22..c7f4f79 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2005-11-16 David Edelsohn <edelsohn@gnu.org> + + PR target/24772 + * config/rs6000/predicates.md (vrsave_operation): SET_SRC is a VEC. + + * config/rs6000/rs6000.md (btruncsf2, ceilsf2, floorsf2, + roundsf2): Remove "s" from mnemonic. + 2005-11-16 Bernd Schmidt <bernd.schmidt@analog.com> * config/bfin/crti.s (__init, __fini): Use appropriate prologue if diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 4ce00b0..0ede69d 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -1038,10 +1038,9 @@ return 0; dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0))); - src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0))); + src_regno = REGNO (XVECEXP (SET_SRC (XVECEXP (op, 0, 0)), 0, 1)); - if (dest_regno != VRSAVE_REGNO - && src_regno != VRSAVE_REGNO) + if (dest_regno != VRSAVE_REGNO || src_regno != VRSAVE_REGNO) return 0; for (i = 1; i < count; i++) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index ee9cc42..935775a 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -5332,7 +5332,7 @@ [(set (match_operand:SF 0 "gpc_reg_operand" "=f") (unspec:SF [(match_operand:SF 1 "gpc_reg_operand" "f")] UNSPEC_FRIZ))] "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS" - "frizs %0,%1" + "friz %0,%1" [(set_attr "type" "fp")]) (define_insn "ceildf2" @@ -5343,10 +5343,10 @@ [(set_attr "type" "fp")]) (define_insn "ceilsf2" - [(set (match_operand:SF 0 "gpc_reg_operand" "=f") + [(set (match_operand:SF 0 "gpc_reg_operand" "=f") (unspec:SF [(match_operand:SF 1 "gpc_reg_operand" "f")] UNSPEC_FRIP))] "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS" - "frips %0,%1" + "frip %0,%1" [(set_attr "type" "fp")]) (define_insn "floordf2" @@ -5360,7 +5360,7 @@ [(set (match_operand:SF 0 "gpc_reg_operand" "=f") (unspec:SF [(match_operand:SF 1 "gpc_reg_operand" "f")] UNSPEC_FRIM))] "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS" - "frims %0,%1" + "frim %0,%1" [(set_attr "type" "fp")]) (define_insn "rounddf2" @@ -5374,7 +5374,7 @@ [(set (match_operand:SF 0 "gpc_reg_operand" "=f") (unspec:SF [(match_operand:SF 1 "gpc_reg_operand" "f")] UNSPEC_FRIN))] "TARGET_FPRND && TARGET_HARD_FLOAT && TARGET_FPRS" - "frins %0,%1" + "frin %0,%1" [(set_attr "type" "fp")]) ; An UNSPEC is used so we don't have to support SImode in FP registers. |