aboutsummaryrefslogtreecommitdiff
path: root/gcc
diff options
context:
space:
mode:
authorKyrylo Tkachov <kyrylo.tkachov@arm.com>2015-01-12 15:14:33 +0000
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>2015-01-12 15:14:33 +0000
commit82ac9e41644a4673f5f592f4596b2e89ea181794 (patch)
tree1b0b61bb0095375041845cb9d259d11eb5e25a2f /gcc
parent57ceb728dcd783fe9c350f79307de8e5e678f1f2 (diff)
downloadgcc-82ac9e41644a4673f5f592f4596b2e89ea181794.zip
gcc-82ac9e41644a4673f5f592f4596b2e89ea181794.tar.gz
gcc-82ac9e41644a4673f5f592f4596b2e89ea181794.tar.bz2
[ARM] Use Cortex-A17 tuning parameters for Cortex-A12
* config/arm/arm.c (arm_cortex_a12_tune): Update entries to match Cortex-A17 tuning parameters. * config/arm/arm-cores.def (cortex-a12): Schedule for cortex-a17. From-SVN: r219472
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/arm/arm-cores.def2
-rw-r--r--gcc/config/arm/arm.c8
3 files changed, 11 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3861f439..c757e0b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,11 @@
2015-01-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+ * config/arm/arm.c (arm_cortex_a12_tune): Update entries to match
+ Cortex-A17 tuning parameters.
+ * config/arm/arm-cores.def (cortex-a12): Schedule for cortex-a17.
+
+2015-01-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
* config/arm/arm-protos.h (tune_params): Add fuseable_ops field.
* config/arm/arm.c (arm_macro_fusion_p): New function.
(arm_macro_fusion_pair_p): Likewise.
diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def
index 6fa5d99..be125ac 100644
--- a/gcc/config/arm/arm-cores.def
+++ b/gcc/config/arm/arm-cores.def
@@ -148,7 +148,7 @@ ARM_CORE("cortex-a5", cortexa5, cortexa5, 7A, FL_LDSCHED, cortex_a5)
ARM_CORE("cortex-a7", cortexa7, cortexa7, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a7)
ARM_CORE("cortex-a8", cortexa8, cortexa8, 7A, FL_LDSCHED, cortex_a8)
ARM_CORE("cortex-a9", cortexa9, cortexa9, 7A, FL_LDSCHED, cortex_a9)
-ARM_CORE("cortex-a12", cortexa12, cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a12)
+ARM_CORE("cortex-a12", cortexa12, cortexa17, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a12)
ARM_CORE("cortex-a15", cortexa15, cortexa15, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15)
ARM_CORE("cortex-a17", cortexa17, cortexa17, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a12)
ARM_CORE("cortex-r4", cortexr4, cortexr4, 7R, FL_LDSCHED, cortex)
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index a9cc3e1..8ca2dd8 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -1950,17 +1950,17 @@ const struct tune_params arm_cortex_a12_tune =
{
arm_9e_rtx_costs,
&cortexa12_extra_costs,
- NULL,
+ NULL, /* Sched adj cost. */
1, /* Constant limit. */
- 5, /* Max cond insns. */
- ARM_PREFETCH_BENEFICIAL(4,32,32),
+ 2, /* Max cond insns. */
+ ARM_PREFETCH_NOT_BENEFICIAL,
false, /* Prefer constant pool. */
arm_default_branch_cost,
true, /* Prefer LDRD/STRD. */
{true, true}, /* Prefer non short circuit. */
&arm_default_vec_cost, /* Vectorizer costs. */
false, /* Prefer Neon for 64-bits bitops. */
- false, false, /* Prefer 32-bit encodings. */
+ true, true, /* Prefer 32-bit encodings. */
true, /* Prefer Neon for stringops. */
8, /* Maximum insns to inline memset. */
ARM_FUSE_MOVW_MOVT /* Fuseable pairs of instructions. */