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author | Richard Henderson <rth@cygnus.com> | 1997-12-15 09:55:10 -0800 |
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committer | Richard Henderson <rth@gcc.gnu.org> | 1997-12-15 09:55:10 -0800 |
commit | 5e21ac7a624b32a8cd3c6261368a0b5e5068a81d (patch) | |
tree | c7612e6ed22793a53dc8de30e430dfcea307813c /gcc | |
parent | 395928138cbdf6b80483edf48aea674efa29599b (diff) | |
download | gcc-5e21ac7a624b32a8cd3c6261368a0b5e5068a81d.zip gcc-5e21ac7a624b32a8cd3c6261368a0b5e5068a81d.tar.gz gcc-5e21ac7a624b32a8cd3c6261368a0b5e5068a81d.tar.bz2 |
alpha.md (zero_extendqihi2, [...]): Use and 255 instead of zapnot 1, since it schedules better.
* alpha.md (zero_extendqihi2, zero_extendqisi2, zero_extendqidi2):
Use and 255 instead of zapnot 1, since it schedules better.
From-SVN: r17103
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/alpha/alpha.md | 20 |
2 files changed, 15 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c9ea3e8..fd9ca7f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +Mon Dec 15 09:44:39 1997 Richard Henderson <rth@cygnus.com> + + * alpha.md (zero_extendqihi2, zero_extendqisi2, zero_extendqidi2): + Use and 255 instead of zapnot 1, since it schedules better. + Mon Dec 15 08:48:24 1997 Jeffrey A Law (law@cygnus.com) * stmt.c (expand_asm_operands): If an ASM has no outputs, then treat diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 6e24c31..cfc98cd 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -811,24 +811,24 @@ [(set (match_operand:HI 0 "register_operand" "=r") (zero_extend:HI (match_operand:QI 1 "register_operand" "r")))] "" - "zapnot %1,1,%0" - [(set_attr "type" "shift")]) + "and %1,255,%0" + [(set_attr "type" "ilog")]) (define_insn "" [(set (match_operand:SI 0 "register_operand" "=r,r") (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,m")))] "TARGET_BWX" "@ - zapnot %1,1,%0 + and %1,255,%0 ldbu %0,%1" - [(set_attr "type" "shift,ld")]) + [(set_attr "type" "ilog,ld")]) (define_insn "" [(set (match_operand:SI 0 "register_operand" "=r") (zero_extend:SI (match_operand:QI 1 "register_operand" "r")))] "! TARGET_BWX" - "zapnot %1,1,%0" - [(set_attr "type" "shift")]) + "and %1,255,%0" + [(set_attr "type" "ilog")]) (define_expand "zero_extendqisi2" [(set (match_operand:SI 0 "register_operand" "") @@ -841,16 +841,16 @@ (zero_extend:DI (match_operand:QI 1 "nonimmediate_operand" "r,m")))] "TARGET_BWX" "@ - zapnot %1,1,%0 + and %1,255,%0 ldbu %0,%1" - [(set_attr "type" "shift,ld")]) + [(set_attr "type" "ilog,ld")]) (define_insn "" [(set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI (match_operand:QI 1 "register_operand" "r")))] "! TARGET_BWX" - "zapnot %1,1,%0" - [(set_attr "type" "shift")]) + "and %1,255,%0" + [(set_attr "type" "ilog")]) (define_expand "zero_extendqidi2" [(set (match_operand:DI 0 "register_operand" "") |