diff options
author | Kugan Vivekanandarajah <kuganv@linaro.org> | 2014-06-17 00:00:59 +0000 |
---|---|---|
committer | Kugan Vivekanandarajah <kugan@gcc.gnu.org> | 2014-06-17 00:00:59 +0000 |
commit | 5db3787171aacab1d1ced94208645a210c5cd515 (patch) | |
tree | b427eed409910248e39292776c04cfd301bf9fd3 /gcc | |
parent | ba38538fd68b2542277ea236a06b9f418e6d77bd (diff) | |
download | gcc-5db3787171aacab1d1ced94208645a210c5cd515.zip gcc-5db3787171aacab1d1ced94208645a210c5cd515.tar.gz gcc-5db3787171aacab1d1ced94208645a210c5cd515.tar.bz2 |
arm.c (arm_atomic_assign_expand_fenv): call default_atomic_assign_expand_fenv for !TARGET_HARD_FLOAT.
gcc/
2014-06-17 Kugan Vivekanandarajah <kuganv@linaro.org>
* config/arm/arm.c (arm_atomic_assign_expand_fenv): call
default_atomic_assign_expand_fenv for !TARGET_HARD_FLOAT.
(arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
__builtins_arm_get_fpscr only when TARGET_HARD_FLOAT.
* config/arm/vfp.md (set_fpscr): Make pattern conditional on
TARGET_HARD_FLOAT.
(get_fpscr) : Likewise.
From-SVN: r211717
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 10 | ||||
-rw-r--r-- | gcc/config/arm/arm.c | 6 | ||||
-rw-r--r-- | gcc/config/arm/vfp.md | 4 |
3 files changed, 15 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index dc0926a..676621e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2014-06-17 Kugan Vivekanandarajah <kuganv@linaro.org> + + * config/arm/arm.c (arm_atomic_assign_expand_fenv): call + default_atomic_assign_expand_fenv for !TARGET_HARD_FLOAT. + (arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and + __builtins_arm_get_fpscr only when TARGET_HARD_FLOAT. + * config/arm/vfp.md (set_fpscr): Make pattern conditional on + TARGET_HARD_FLOAT. + (get_fpscr) : Likewise. + 2014-06-16 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/61325 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index c68d888..85d2114 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -24762,7 +24762,7 @@ arm_init_builtins (void) if (TARGET_CRC32) arm_init_crc32_builtins (); - if (TARGET_VFP) + if (TARGET_VFP && TARGET_HARD_FLOAT) { tree ftype_set_fpscr = build_function_type_list (void_type_node, unsigned_type_node, NULL); @@ -31454,8 +31454,8 @@ arm_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update) tree new_fenv_var, reload_fenv, restore_fnenv; tree update_call, atomic_feraiseexcept, hold_fnclex; - if (!TARGET_VFP) - return; + if (!TARGET_VFP || !TARGET_HARD_FLOAT) + return default_atomic_assign_expand_fenv (hold, clear, update); /* Generate the equivalent of : unsigned int fenv_var; diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md index a8b27bc..9962bd3 100644 --- a/gcc/config/arm/vfp.md +++ b/gcc/config/arm/vfp.md @@ -1325,7 +1325,7 @@ ;; Write Floating-point Status and Control Register. (define_insn "set_fpscr" [(unspec_volatile [(match_operand:SI 0 "register_operand" "r")] VUNSPEC_SET_FPSCR)] - "TARGET_VFP" + "TARGET_VFP && TARGET_HARD_FLOAT" "mcr\\tp10, 7, %0, cr1, cr0, 0\\t @SET_FPSCR" [(set_attr "type" "mrs")]) @@ -1333,7 +1333,7 @@ (define_insn "get_fpscr" [(set (match_operand:SI 0 "register_operand" "=r") (unspec_volatile:SI [(const_int 0)] VUNSPEC_GET_FPSCR))] - "TARGET_VFP" + "TARGET_VFP && TARGET_HARD_FLOAT" "mrc\\tp10, 7, %0, cr1, cr0, 0\\t @GET_FPSCR" [(set_attr "type" "mrs")]) |