When not involving named pattern, update condition to include alpha_tp != ALPHA_TP_INSN.

When not involving named pattern, update condition to
include alpha_tp != ALPHA_TP_INSN.
Don't do float_extend as part of other pattern when ALPHA_TP_INSN.
(extendsfsd2): Split into two patterns, depending on value of alpha_tp.

From-SVN: r12302

1 files changed, 56 insertions, 245 deletions

diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index b3028ea..826ffb1 100644
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -1313,7 +1313,7 @@
   [(set (match_operand:SF 0 "register_operand" "=&f")
 	(plus:SF (match_operand:SF 1 "reg_or_fp0_operand" "%fG")
 		 (match_operand:SF 2 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
   "adds%)%& %R1,%R2,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
@@ -1331,7 +1331,7 @@
   [(set (match_operand:DF 0 "register_operand" "=&f")
 	(plus:DF (match_operand:DF 1 "reg_or_fp0_operand" "%fG")
 		 (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
   "addt%)%& %R1,%R2,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
@@ -1346,32 +1346,11 @@
    (set_attr "trap" "yes")])
 
 (define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f")
-	(plus:DF (float_extend:DF
-		  (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
-		 (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
-  "addt%)%& %R1,%R2,%0"
-  [(set_attr "type" "fadd")
-   (set_attr "trap" "yes")])
-
-(define_insn ""
   [(set (match_operand:DF 0 "register_operand" "=f")
 	(plus:DF (float_extend:DF
 		  (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
 		 (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP"
-  "addt%)%& %R1,%R2,%0"
-  [(set_attr "type" "fadd")
-   (set_attr "trap" "yes")])
-
-(define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f")
-	(plus:DF (float_extend:DF
-		  (match_operand:SF 1 "reg_or_fp0_operand" "%fG"))
-		 (float_extend:DF
-		  (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "addt%)%& %R1,%R2,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
@@ -1382,7 +1361,7 @@
 		  (match_operand:SF 1 "reg_or_fp0_operand" "%fG"))
 		 (float_extend:DF
 		  (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
-  "TARGET_FP"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "addt%)%& %R1,%R2,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
@@ -1402,14 +1381,6 @@
   "cvttqc %R1,%0"
   [(set_attr "type" "fadd")])
 
-(define_insn ""
-  [(set (match_operand:SF 0 "register_operand" "=&f")
-	(float:SF (match_operand:DI 1 "register_operand" "f")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
-  "cvtqs%+%& %1,%0"
-  [(set_attr "type" "fadd")
-   (set_attr "trap" "yes")])
-
 (define_insn "floatdisf2"
   [(set (match_operand:SF 0 "register_operand" "=f")
 	(float:SF (match_operand:DI 1 "register_operand" "f")))]
@@ -1421,7 +1392,7 @@
 (define_insn ""
   [(set (match_operand:DF 0 "register_operand" "=&f")
 	(float:DF (match_operand:DI 1 "register_operand" "f")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
   "cvtqt%+%& %1,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
@@ -1434,20 +1405,33 @@
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
 
-(define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f,f")
-	(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "f,m")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
-  "@
-   addt%)%& $f31,%1,%0
-   lds %0,%1"
-  [(set_attr "type" "fadd,ld")
+(define_expand "extendsfdf2"
+  [(use (match_operand:DF 0 "register_operand" ""))
+   (use (match_operand:SF 1 "nonimmediate_operand" ""))]
+  "TARGET_FP"
+"
+{
+  if (alpha_tp == ALPHA_TP_INSN)
+    emit_insn (gen_extendsfdf2_tp (operands[0],
+				   force_reg (SFmode, operands[1])));
+  else
+    emit_insn (gen_extendsfdf2_no_tp (operands[0], operands[1]));
+
+  DONE;
+}")
+
+(define_insn "extendsfdf2_tp"
+  [(set (match_operand:DF 0 "register_operand" "=&f")
+	(float_extend:DF (match_operand:SF 1 "register_operand" "f")))]
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
+  "cvtsts %1,%0"
+  [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
 
-(define_insn "extendsfdf2"
+(define_insn "extendsfdf2_no_tp"
   [(set (match_operand:DF 0 "register_operand" "=f,f")
 	(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "f,m")))]
-  "TARGET_FP"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "@
    addt%)%& $f31,%1,%0
    lds %0,%1"
@@ -1457,7 +1441,7 @@
 (define_insn ""
   [(set (match_operand:SF 0 "register_operand" "=&f")
 	(float_truncate:SF (match_operand:DF 1 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
   "cvtts%)%& %R1,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
@@ -1474,7 +1458,7 @@
   [(set (match_operand:SF 0 "register_operand" "=&f")
 	(div:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG")
 		(match_operand:SF 2 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
   "divs%)%& %R1,%R2,%0"
   [(set_attr "type" "fdivs")
    (set_attr "trap" "yes")])
@@ -1492,7 +1476,7 @@
   [(set (match_operand:DF 0 "register_operand" "=&f")
 	(div:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG")
 		(match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
   "divt%)%& %R1,%R2,%0"
   [(set_attr "type" "fdivt")
    (set_attr "trap" "yes")])
@@ -1507,29 +1491,10 @@
    (set_attr "trap" "yes")])
 
 (define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f")
-	(div:DF (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
-		(match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
-  "divt%)%& %R1,%R2,%0"
-  [(set_attr "type" "fdivt")
-   (set_attr "trap" "yes")])
-
-(define_insn ""
   [(set (match_operand:DF 0 "register_operand" "=f")
 	(div:DF (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
 		(match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP"
-  "divt%)%& %R1,%R2,%0"
-  [(set_attr "type" "fdivt")
-   (set_attr "trap" "yes")])
-
-(define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f")
-	(div:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG")
-		(float_extend:DF
-		 (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "divt%)%& %R1,%R2,%0"
   [(set_attr "type" "fdivt")
    (set_attr "trap" "yes")])
@@ -1539,16 +1504,7 @@
 	(div:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG")
 		(float_extend:DF
 		 (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
-  "TARGET_FP"
-  "divt%)%& %R1,%R2,%0"
-  [(set_attr "type" "fdivt")
-   (set_attr "trap" "yes")])
-
-(define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f")
-	(div:DF (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
-		(float_extend:DF (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "divt%)%& %R1,%R2,%0"
   [(set_attr "type" "fdivt")
    (set_attr "trap" "yes")])
@@ -1557,7 +1513,7 @@
   [(set (match_operand:DF 0 "register_operand" "=f")
 	(div:DF (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
 		(float_extend:DF (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
-  "TARGET_FP"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "divt%)%& %R1,%R2,%0"
   [(set_attr "type" "fdivt")
    (set_attr "trap" "yes")])
@@ -1566,7 +1522,7 @@
   [(set (match_operand:SF 0 "register_operand" "=&f")
 	(mult:SF (match_operand:SF 1 "reg_or_fp0_operand" "%fG")
 		 (match_operand:SF 2 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
   "muls%)%& %R1,%R2,%0"
   [(set_attr "type" "fmul")
    (set_attr "trap" "yes")])
@@ -1584,7 +1540,7 @@
   [(set (match_operand:DF 0 "register_operand" "=&f")
 	(mult:DF (match_operand:DF 1 "reg_or_fp0_operand" "%fG")
 		 (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
   "mult%)%& %R1,%R2,%0"
   [(set_attr "type" "fmul")
    (set_attr "trap" "yes")])
@@ -1599,32 +1555,11 @@
    (set_attr "trap" "yes")])
 
 (define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f")
-	(mult:DF (float_extend:DF
-		  (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
-		 (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
-  "mult%)%& %R1,%R2,%0"
-  [(set_attr "type" "fmul")
-   (set_attr "trap" "yes")])
-
-(define_insn ""
   [(set (match_operand:DF 0 "register_operand" "=f")
 	(mult:DF (float_extend:DF
 		  (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
 		 (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP"
-  "mult%)%& %R1,%R2,%0"
-  [(set_attr "type" "fmul")
-   (set_attr "trap" "yes")])
-
-(define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f")
-	(mult:DF (float_extend:DF
-		  (match_operand:SF 1 "reg_or_fp0_operand" "%fG"))
-		 (float_extend:DF
-		  (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "mult%)%& %R1,%R2,%0"
   [(set_attr "type" "fmul")
    (set_attr "trap" "yes")])
@@ -1635,7 +1570,7 @@
 		  (match_operand:SF 1 "reg_or_fp0_operand" "%fG"))
 		 (float_extend:DF
 		  (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
-  "TARGET_FP"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "mult%)%& %R1,%R2,%0"
   [(set_attr "type" "fmul")
    (set_attr "trap" "yes")])
@@ -1644,7 +1579,7 @@
   [(set (match_operand:SF 0 "register_operand" "=&f")
 	(minus:SF (match_operand:SF 1 "reg_or_fp0_operand" "fG")
 		  (match_operand:SF 2 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
   "subs%)%& %R1,%R2,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
@@ -1662,7 +1597,7 @@
   [(set (match_operand:DF 0 "register_operand" "=&f")
 	(minus:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG")
 		  (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
   "subt%)%& %R1,%R2,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
@@ -1677,31 +1612,11 @@
    (set_attr "trap" "yes")])
 
 (define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f")
-	(minus:DF (float_extend:DF
-		   (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
-		  (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
-  "subt%)%& %R1,%R2,%0"
-  [(set_attr "type" "fadd")
-   (set_attr "trap" "yes")])
-
-(define_insn ""
   [(set (match_operand:DF 0 "register_operand" "=f")
 	(minus:DF (float_extend:DF
 		   (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
 		  (match_operand:DF 2 "reg_or_fp0_operand" "fG")))]
-  "TARGET_FP"
-  "subt%)%& %R1,%R2,%0"
-  [(set_attr "type" "fadd")
-   (set_attr "trap" "yes")])
-
-(define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f")
-	(minus:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG")
-		  (float_extend:DF
-		   (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "subt%)%& %R1,%R2,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
@@ -1711,18 +1626,7 @@
 	(minus:DF (match_operand:DF 1 "reg_or_fp0_operand" "fG")
 		  (float_extend:DF
 		   (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
-  "TARGET_FP"
-  "subt%)%& %R1,%R2,%0"
-  [(set_attr "type" "fadd")
-   (set_attr "trap" "yes")])
-
-(define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f")
-	(minus:DF (float_extend:DF
-		   (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
-		  (float_extend:DF
-		   (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "subt%)%& %R1,%R2,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
@@ -1733,7 +1637,7 @@
 		   (match_operand:SF 1 "reg_or_fp0_operand" "fG"))
 		  (float_extend:DF
 		   (match_operand:SF 2 "reg_or_fp0_operand" "fG"))))]
-  "TARGET_FP"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "subt%)%& %R1,%R2,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
@@ -2157,7 +2061,7 @@
 	(match_operator:DF 1 "alpha_comparison_operator"
 			   [(match_operand:DF 2 "reg_or_fp0_operand" "fG")
 			    (match_operand:DF 3 "reg_or_fp0_operand" "fG")]))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
   "cmpt%C1%' %R2,%R3,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
@@ -2167,18 +2071,7 @@
 	(match_operator:DF 1 "alpha_comparison_operator"
 			   [(match_operand:DF 2 "reg_or_fp0_operand" "fG")
 			    (match_operand:DF 3 "reg_or_fp0_operand" "fG")]))]
-  "TARGET_FP"
-  "cmpt%C1%' %R2,%R3,%0"
-  [(set_attr "type" "fadd")
-   (set_attr "trap" "yes")])
-
-(define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f")
-	(match_operator:DF 1 "alpha_comparison_operator"
-			   [(float_extend:DF
-			     (match_operand:SF 2 "reg_or_fp0_operand" "fG"))
-			    (match_operand:DF 3 "reg_or_fp0_operand" "fG")]))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "cmpt%C1%' %R2,%R3,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
@@ -2189,18 +2082,7 @@
 			   [(float_extend:DF
 			     (match_operand:SF 2 "reg_or_fp0_operand" "fG"))
 			    (match_operand:DF 3 "reg_or_fp0_operand" "fG")]))]
-  "TARGET_FP"
-  "cmpt%C1%' %R2,%R3,%0"
-  [(set_attr "type" "fadd")
-   (set_attr "trap" "yes")])
-
-(define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f")
-	(match_operator:DF 1 "alpha_comparison_operator"
-			   [(match_operand:DF 2 "reg_or_fp0_operand" "fG")
-			    (float_extend:DF
-			     (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "cmpt%C1%' %R2,%R3,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
@@ -2211,19 +2093,7 @@
 			   [(match_operand:DF 2 "reg_or_fp0_operand" "fG")
 			    (float_extend:DF
 			     (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))]
-  "TARGET_FP"
-  "cmpt%C1%' %R2,%R3,%0"
-  [(set_attr "type" "fadd")
-   (set_attr "trap" "yes")])
-
-(define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f")
-	(match_operator:DF 1 "alpha_comparison_operator"
-			   [(float_extend:DF
-			     (match_operand:SF 2 "reg_or_fp0_operand" "fG"))
-			    (float_extend:DF
-			     (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "cmpt%C1%' %R2,%R3,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
@@ -2235,7 +2105,7 @@
 			     (match_operand:SF 2 "reg_or_fp0_operand" "fG"))
 			    (float_extend:DF
 			     (match_operand:SF 3 "reg_or_fp0_operand" "fG"))]))]
-  "TARGET_FP"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "cmpt%C1%' %R2,%R3,%0"
   [(set_attr "type" "fadd")
    (set_attr "trap" "yes")])
@@ -2248,7 +2118,7 @@
 			  (match_operand:DF 2 "fp0_operand" "G,G")])
 	 (match_operand:DF 1 "reg_or_fp0_operand" "fG,0")
 	 (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
   "@
    fcmov%C3 %R4,%R1,%0
    fcmov%D3 %R4,%R5,%0"
@@ -2262,7 +2132,7 @@
 			  (match_operand:DF 2 "fp0_operand" "G,G")])
 	 (match_operand:DF 1 "reg_or_fp0_operand" "fG,0")
 	 (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "@
    fcmov%C3 %R4,%R1,%0
    fcmov%D3 %R4,%R5,%0"
@@ -2276,7 +2146,7 @@
 			  (match_operand:DF 2 "fp0_operand" "G,G")])
 	 (match_operand:SF 1 "reg_or_fp0_operand" "fG,0")
 	 (match_operand:SF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp == ALPHA_TP_INSN"
   "@
    fcmov%C3 %R4,%R1,%0
    fcmov%D3 %R4,%R5,%0"
@@ -2290,36 +2160,7 @@
 			  (match_operand:DF 2 "fp0_operand" "G,G")])
 	 (match_operand:SF 1 "reg_or_fp0_operand" "fG,0")
 	 (match_operand:SF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP"
-  "@
-   fcmov%C3 %R4,%R1,%0
-   fcmov%D3 %R4,%R5,%0"
-  [(set_attr "type" "fadd")])
-
-(define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f,f")
-	(if_then_else:DF 
-	 (match_operator 3 "signed_comparison_operator"
-			 [(match_operand:DF 1 "reg_or_fp0_operand" "fG,fG")
-			  (match_operand:DF 2 "fp0_operand" "G,G")])
-	 (float_extend:DF (match_operand:SF 4 "reg_or_fp0_operand" "fG,0"))
-	 (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
-  "@
-   fcmov%C3 %R4,%R1,%0
-   fcmov%D3 %R4,%R5,%0"
-  [(set_attr "type" "fadd")])
-
-(define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f,f")
-	(if_then_else:DF 
-	 (match_operator 3 "signed_comparison_operator"
-			 [(float_extend:DF 
-			   (match_operand:SF 4 "reg_or_fp0_operand" "fG,fG"))
-			  (match_operand:DF 2 "fp0_operand" "G,G")])
-	 (match_operand:DF 1 "reg_or_fp0_operand" "fG,0")
-	 (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "@
    fcmov%C3 %R4,%R1,%0
    fcmov%D3 %R4,%R5,%0"
@@ -2333,7 +2174,7 @@
 			  (match_operand:DF 2 "fp0_operand" "G,G")])
 	 (float_extend:DF (match_operand:SF 4 "reg_or_fp0_operand" "fG,0"))
 	 (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "@
    fcmov%C3 %R4,%R1,%0
    fcmov%D3 %R4,%R5,%0"
@@ -2348,22 +2189,7 @@
 			  (match_operand:DF 2 "fp0_operand" "G,G")])
 	 (match_operand:DF 1 "reg_or_fp0_operand" "fG,0")
 	 (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP"
-  "@
-   fcmov%C3 %R4,%R1,%0
-   fcmov%D3 %R4,%R5,%0"
-  [(set_attr "type" "fadd")])
-
-(define_insn ""
-  [(set (match_operand:SF 0 "register_operand" "=&f,f")
-	(if_then_else:SF 
-	 (match_operator 3 "signed_comparison_operator"
-			 [(float_extend:DF
-			   (match_operand:SF 4 "reg_or_fp0_operand" "fG,fG"))
-			  (match_operand:DF 2 "fp0_operand" "G,G")])
-	 (match_operand:SF 1 "reg_or_fp0_operand" "fG,0")
-	 (match_operand:SF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "@
    fcmov%C3 %R4,%R1,%0
    fcmov%D3 %R4,%R5,%0"
@@ -2378,22 +2204,7 @@
 			  (match_operand:DF 2 "fp0_operand" "G,G")])
 	 (match_operand:SF 1 "reg_or_fp0_operand" "fG,0")
 	 (match_operand:SF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP"
-  "@
-   fcmov%C3 %R4,%R1,%0
-   fcmov%D3 %R4,%R5,%0"
-  [(set_attr "type" "fadd")])
-
-(define_insn ""
-  [(set (match_operand:DF 0 "register_operand" "=&f,f")
-	(if_then_else:DF 
-	 (match_operator 3 "signed_comparison_operator"
-			 [(float_extend:DF
-			   (match_operand:SF 4 "reg_or_fp0_operand" "fG,fG"))
-			  (match_operand:DF 2 "fp0_operand" "G,G")])
-	 (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG,0"))
-	 (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP && (alpha_tp == ALPHA_TP_INSN)"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "@
    fcmov%C3 %R4,%R1,%0
    fcmov%D3 %R4,%R5,%0"
@@ -2408,7 +2219,7 @@
 			  (match_operand:DF 2 "fp0_operand" "G,G")])
 	 (float_extend:DF (match_operand:SF 1 "reg_or_fp0_operand" "fG,0"))
 	 (match_operand:DF 5 "reg_or_fp0_operand" "0,fG")))]
-  "TARGET_FP"
+  "TARGET_FP && alpha_tp != ALPHA_TP_INSN"
   "@
    fcmov%C3 %R4,%R1,%0
    fcmov%D3 %R4,%R5,%0"