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authorRichard Sandiford <rsandifo@redhat.com>2001-07-12 08:53:02 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2001-07-12 08:53:02 +0000
commit51c6b247049453fde14806ec97ce48e2e9727277 (patch)
treeaa815dd59c430ebf82fd831d9895989a9dc0d214 /gcc
parent7ed47c042e44ac0809d65ddfec988e1305067239 (diff)
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mips.c (print_operand): Extend '%D' to memory operands.
* config/mips/mips.c (print_operand): Extend '%D' to memory operands. (mips_move_2words): When splitting a move into two instructions, prefix the second address operand with '%D'. From-SVN: r43964
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/mips/mips.c28
2 files changed, 18 insertions, 16 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 866a6d6..e4b982a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2001-07-06 Richard Sandiford <rsandifo@redhat.com>
+
+ * config/mips/mips.c (print_operand): Extend '%D' to memory operands.
+ (mips_move_2words): When splitting a move into two instructions,
+ prefix the second address operand with '%D'.
+
2001-07-12 Neil Booth <neil@daikokuya.demon.co.uk>
* Makefile.in (final.o): Depend on debug.h.
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index dd2e3e3..7923234 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -2548,12 +2548,9 @@ mips_move_2words (operands, insn)
}
else if (double_memory_operand (op1, GET_MODE (op1)))
- {
- operands[2] = adjust_address (op1, SImode, 4);
- ret = (reg_mentioned_p (op0, op1)
- ? "lw\t%D0,%2\n\tlw\t%0,%1"
- : "lw\t%0,%1\n\tlw\t%D0,%2");
- }
+ ret = (reg_mentioned_p (op0, op1)
+ ? "lw\t%D0,%D1\n\tlw\t%0,%1"
+ : "lw\t%0,%1\n\tlw\t%D0,%D1");
if (ret != 0 && MEM_VOLATILE_P (op1))
{
@@ -2642,10 +2639,7 @@ mips_move_2words (operands, insn)
}
else if (double_memory_operand (op0, GET_MODE (op0)))
- {
- operands[2] = adjust_address (op0, SImode, 4);
- ret = "sw\t%1,%0\n\tsw\t%D1,%2";
- }
+ ret = "sw\t%1,%0\n\tsw\t%D1,%D0";
}
else if (((code1 == CONST_INT && INTVAL (op1) == 0)
@@ -2657,10 +2651,7 @@ mips_move_2words (operands, insn)
if (TARGET_64BIT)
ret = "sd\t%.,%0";
else
- {
- operands[2] = adjust_address (op0, SImode, 4);
- ret = "sw\t%.,%0\n\tsw\t%.,%2";
- }
+ ret = "sw\t%.,%0\n\tsw\t%.,%D0";
}
if (TARGET_STATS)
@@ -5280,7 +5271,7 @@ mips_debugger_offset (addr, offset)
'x' X is CONST_INT, prints 16 bits in hexadecimal format = "0x%04x",
'd' output integer constant in decimal,
'z' if the operand is 0, use $0 instead of normal operand.
- 'D' print second register of double-word register operand.
+ 'D' print second part of double-word register or memory operand.
'L' print low-order register of double-word register operand.
'M' print high-order register of double-word register operand.
'C' print part of opcode for a branch condition.
@@ -5551,7 +5542,12 @@ print_operand (file, op, letter)
}
else if (code == MEM)
- output_address (XEXP (op, 0));
+ {
+ if (letter == 'D')
+ output_address (plus_constant (XEXP (op, 0), 4));
+ else
+ output_address (XEXP (op, 0));
+ }
else if (code == CONST_DOUBLE
&& GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT)