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| author | Chung-Ju Wu <jasonwucj@gmail.com> | 2018-04-05 03:05:45 +0000 |
|---|---|---|
| committer | Chung-Ju Wu <jasonwucj@gcc.gnu.org> | 2018-04-05 03:05:45 +0000 |
| commit | 50ea1e4ad5f0b926799f935115dcdcb128a4764e (patch) | |
| tree | a68be63ee32b646b8d0d00e778b1da2e88b8c0d1 /gcc | |
| parent | 3fbbd9e5adf2541a5f76f423697ac2c9020ae99e (diff) | |
| download | gcc-50ea1e4ad5f0b926799f935115dcdcb128a4764e.zip gcc-50ea1e4ad5f0b926799f935115dcdcb128a4764e.tar.gz gcc-50ea1e4ad5f0b926799f935115dcdcb128a4764e.tar.bz2 | |
[NDS32] Add divsi4 and udivsi4 patterns.
gcc/
* config/nds32/nds32.md (divsi4, udivsi4): New patterns.
From-SVN: r259119
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/nds32/nds32.md | 20 |
2 files changed, 24 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index cb27056..485c59e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,9 @@ 2018-04-05 Chung-Ju Wu <jasonwucj@gmail.com> + * config/nds32/nds32.md (divsi4, udivsi4): New patterns. + +2018-04-05 Chung-Ju Wu <jasonwucj@gmail.com> + * config/nds32/nds32.md (negsi2): Refine pattern. 2018-04-05 Kito Cheng <kito.cheng@gmail.com> diff --git a/gcc/config/nds32/nds32.md b/gcc/config/nds32/nds32.md index f69dd9d..2d0f1d3 100644 --- a/gcc/config/nds32/nds32.md +++ b/gcc/config/nds32/nds32.md @@ -535,6 +535,26 @@ [(set_attr "type" "div") (set_attr "length" "4")]) +;; divsr/divr will keep quotient only when quotient and remainder is the same +;; register in our ISA spec, it's can reduce 1 register presure if we don't +;; want remainder. +(define_insn "divsi4" + [(set (match_operand:SI 0 "register_operand" "=r") + (div:SI (match_operand:SI 1 "register_operand" " r") + (match_operand:SI 2 "register_operand" " r")))] + "" + "divsr\t%0, %0, %1, %2" + [(set_attr "type" "div") + (set_attr "length" "4")]) + +(define_insn "udivsi4" + [(set (match_operand:SI 0 "register_operand" "=r") + (udiv:SI (match_operand:SI 1 "register_operand" " r") + (match_operand:SI 2 "register_operand" " r")))] + "" + "divr\t%0, %0, %1, %2" + [(set_attr "type" "div") + (set_attr "length" "4")]) ;; ---------------------------------------------------------------------------- |