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| author | Jakub Jelinek <jakub@redhat.com> | 2022-11-10 11:46:52 +0100 |
|---|---|---|
| committer | Jakub Jelinek <jakub@redhat.com> | 2022-11-10 11:46:52 +0100 |
| commit | 49de156a6adb50e0624479f22c20141cadef812d (patch) | |
| tree | bfc6a7124dc43f0b477a5706f5c9823cd9a90315 /gcc | |
| parent | 9072763f4f17e600a980ff510b2baf8ad8ada1b5 (diff) | |
| download | gcc-49de156a6adb50e0624479f22c20141cadef812d.zip gcc-49de156a6adb50e0624479f22c20141cadef812d.tar.gz gcc-49de156a6adb50e0624479f22c20141cadef812d.tar.bz2 | |
i386: Fix up ix86_expand_int_sse_cmp [PR107585]
The following patch fixes ICE on the testcase. I've used GEN_INT
incorrectly thinking the code punts on the problematic boundaries.
It does, but only for LE and GE, i.e. signed comparisons, for unsigned
the boundaries are 0 and unsigned maximum, so when say unsigned char
adds one to 127 or subtracts one from 128 we need to canonicalize it.
2022-11-10 Jakub Jelinek <jakub@redhat.com>
PR target/107585
PR target/107546
* config/i386/i386-expand.cc (ix86_expand_int_sse_cmp): Use
gen_int_mode rather than GEN_INT.
* gcc.dg/pr107585.c: New test.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/i386/i386-expand.cc | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/pr107585.c | 13 |
2 files changed, 17 insertions, 2 deletions
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index 9c92b07..acf9e00 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -4540,7 +4540,8 @@ ix86_expand_int_sse_cmp (rtx dest, enum rtx_code code, rtx cop0, rtx cop1, rtvec v = rtvec_alloc (n_elts); for (i = 0; i < n_elts; ++i) RTVEC_ELT (v, i) - = GEN_INT (INTVAL (CONST_VECTOR_ELT (cop1, i)) + 1); + = gen_int_mode (INTVAL (CONST_VECTOR_ELT (cop1, i)) + 1, + eltmode); cop1 = gen_rtx_CONST_VECTOR (mode, v); std::swap (cop0, cop1); code = code == LE ? GT : GTU; @@ -4584,7 +4585,8 @@ ix86_expand_int_sse_cmp (rtx dest, enum rtx_code code, rtx cop0, rtx cop1, rtvec v = rtvec_alloc (n_elts); for (i = 0; i < n_elts; ++i) RTVEC_ELT (v, i) - = GEN_INT (INTVAL (CONST_VECTOR_ELT (cop1, i)) - 1); + = gen_int_mode (INTVAL (CONST_VECTOR_ELT (cop1, i)) - 1, + eltmode); cop1 = gen_rtx_CONST_VECTOR (mode, v); code = code == GE ? GT : GTU; break; diff --git a/gcc/testsuite/gcc.dg/pr107585.c b/gcc/testsuite/gcc.dg/pr107585.c new file mode 100644 index 0000000..820e04b --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr107585.c @@ -0,0 +1,13 @@ +/* PR target/107585 */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +typedef unsigned char __attribute__((__vector_size__ (16))) V; +char c; +void bar (int); + +void +foo (void) +{ + bar (((V) (c <= (V){127}))[2]); +} |