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| author | GCC Administrator <gccadmin@gcc.gnu.org> | 2024-03-10 00:17:04 +0000 |
|---|---|---|
| committer | GCC Administrator <gccadmin@gcc.gnu.org> | 2024-03-10 00:17:04 +0000 |
| commit | 3e05eb949d77201a0220e2e596656967c716063f (patch) | |
| tree | f22b98c669ac4383a45b60953b3e2dedd4f0f5b9 /gcc | |
| parent | f5a805d82902fe2d6e0a7af8c0e6519f9d25a8f3 (diff) | |
| download | gcc-3e05eb949d77201a0220e2e596656967c716063f.zip gcc-3e05eb949d77201a0220e2e596656967c716063f.tar.gz gcc-3e05eb949d77201a0220e2e596656967c716063f.tar.bz2 | |
Daily bump.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 39 | ||||
| -rw-r--r-- | gcc/DATESTAMP | 2 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 15 |
3 files changed, 55 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5b966a6..3ac5f03 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,42 @@ +2024-03-09 Georg-Johann Lay <avr@gjlay.de> + + * config/avr/avr.md: Fix typos in comment, indentation glitches + and some other nits. + +2024-03-09 Jakub Jelinek <jakub@redhat.com> + + PR target/114284 + * fwprop.cc (try_fwprop_subst_pattern): Don't propagate + src containing MEMs unless prop.likely_profitable_p (). + +2024-03-09 Xi Ruoyao <xry111@xry111.site> + + * config/loongarch/loongarch.cc (loongarch_print_operand_reloc): + Support 'Q' for R_LARCH_RELAX for TLS IE. + (loongarch_output_move): Use 'Q' to print R_LARCH_RELAX for TLS + IE. + * config/loongarch/loongarch.md (ld_from_got<mode>): Likewise. + +2024-03-09 Georg-Johann Lay <avr@gjlay.de> + + * config/avr/avr.cc (avr_rtx_costs_1) [PLUS]: Determine cost for + usum_widenqihi and add_zero_extend1. + [MINUS]: Determine costs for udiff_widenqihi, sub+zero_extend, + sub+sign_extend. + * config/avr/avr.md (*addhi3.sign_extend1, *subhi3.sign_extend2): + Compute exact insn lengths. + (*usum_widenqihi3): Allow input operands to commute. + +2024-03-09 Jakub Jelinek <jakub@redhat.com> + + * config/i386/i386.opt.urls: Regenerate. + +2024-03-09 Lulu Cheng <chenglulu@loongson.cn> + + * config/loongarch/sync.md (atomic_cas_value_strong<mode>): + In loongarch64, a sign extension operation is added when + operands[2] is a register operand and the mode is SImode. + 2024-03-08 Martin Jambor <mjambor@suse.cz> PR ipa/113757 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 7237a50..a187030 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20240309 +20240310 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index fce619c..1486789 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,18 @@ +2024-03-09 Xi Ruoyao <xry111@xry111.site> + + * gcc.target/loongarch/tls-ie-relax.c: New test. + * gcc.target/loongarch/tls-ie-norelax.c: New test. + * gcc.target/loongarch/tls-ie-extreme.c: New test. + +2024-03-09 Lulu Cheng <chenglulu@loongson.cn> + + * gcc.target/loongarch/regname-fp-s9.c: Add compilation option + '-Wno-pedantic -std=gnu90'. + +2024-03-09 Lulu Cheng <chenglulu@loongson.cn> + + * g++.target/loongarch/atomic-cas-int.C: New test. + 2024-03-08 Martin Jambor <mjambor@suse.cz> PR ipa/113757 |