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| author | Kito Cheng <kito.cheng@sifive.com> | 2023-04-14 15:34:40 +0800 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2023-04-17 09:51:36 +0800 |
| commit | 2e6b57196dd0e1f4b308abb958f5f905f0ba6aba (patch) | |
| tree | fedeae6df51b820f367ca7d3cccc54da169737bf /gcc | |
| parent | 0c4d366ef757da28800f786fb5ea02b6e4918719 (diff) | |
| download | gcc-2e6b57196dd0e1f4b308abb958f5f905f0ba6aba.zip gcc-2e6b57196dd0e1f4b308abb958f5f905f0ba6aba.tar.gz gcc-2e6b57196dd0e1f4b308abb958f5f905f0ba6aba.tar.bz2 | |
RISC-V: Fix testsuite fail on RV32
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/scalar_move-2.c: Adjust include way
for riscv_vector.h
* gcc.target/riscv/rvv/base/spill-sp-adjust.c: Add missing
-mabi.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-2.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/riscv/rvv/base/spill-sp-adjust.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-2.c b/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-2.c index 39fc107..5b538ba 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-2.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-2.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-march=rv64gcv -mabi=lp64d -O3 -fno-schedule-insns -fno-schedule-insns2" } */ -#include <riscv_vector.h> +#include "riscv_vector.h" /* ** foo1: diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/spill-sp-adjust.c b/gcc/testsuite/gcc.target/riscv/rvv/base/spill-sp-adjust.c index f8c9f63..a6598a5 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/spill-sp-adjust.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/base/spill-sp-adjust.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-march=rv64gcv" } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ #include "spill-1.c" |