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authorJakub Jelinek <jakub@redhat.com>2017-03-06 12:35:58 +0100
committerJakub Jelinek <jakub@gcc.gnu.org>2017-03-06 12:35:58 +0100
commit296cc393ef40d49f9e8cd9ce7280cb173dbf93d8 (patch)
treef03b6970b62318cffdec898ee0caf8bc295aec2f /gcc
parentca8942a34aba3b4d97b1c5f8fd63a389fa63749e (diff)
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re PR target/79812 (ICE in simplify_binary_operation_1, at simplify-rtx.c:3586)
PR target/79812 * config/i386/sse.md (VI8F_256_512): Remove mode iterator. (<avx2_avx512>_perm<mode>): Rename to ... (avx2_perm<mode>): ... this. Use VI8F_256 iterator instead of VI8F_256_512. (<avx512>_perm<mode>_mask): Rename to ... (avx512vl_perm<mode>_mask): ... this. Use VI8F_256 iterator instead of VI8F_256_512. (<avx2_avx512>_perm<mode>_1<mask_name>): Rename to ... (avx2_perm<mode>_1<mask_name): ... this. Use VI8F_256 iterator instead of VI8F_256_512. (avx512f_perm<mode>): New define_expand. (avx512f_perm<mode>_mask): Likewise. (avx512f_perm<mode>_1<mask_name>): New define_insn. (<avx512>_vec_dup<mode>_1): Fix up vec_select mode. * gcc.target/i386/avx512f-vpermq-imm-3.c: New test. From-SVN: r245915
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog18
-rw-r--r--gcc/config/i386/sse.md119
-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.target/i386/avx512f-vpermq-imm-3.c5
4 files changed, 122 insertions, 25 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5fbe9ef..27a3472 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,21 @@
+2017-03-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/79812
+ * config/i386/sse.md (VI8F_256_512): Remove mode iterator.
+ (<avx2_avx512>_perm<mode>): Rename to ...
+ (avx2_perm<mode>): ... this. Use VI8F_256 iterator instead
+ of VI8F_256_512.
+ (<avx512>_perm<mode>_mask): Rename to ...
+ (avx512vl_perm<mode>_mask): ... this. Use VI8F_256 iterator instead
+ of VI8F_256_512.
+ (<avx2_avx512>_perm<mode>_1<mask_name>): Rename to ...
+ (avx2_perm<mode>_1<mask_name): ... this. Use VI8F_256 iterator
+ instead of VI8F_256_512.
+ (avx512f_perm<mode>): New define_expand.
+ (avx512f_perm<mode>_mask): Likewise.
+ (avx512f_perm<mode>_1<mask_name>): New define_insn.
+ (<avx512>_vec_dup<mode>_1): Fix up vec_select mode.
+
2017-03-06 Prachi Godbole <prachi.godbole@imgtec.com>
* config/mips/mips-msa.md (msa_fmax_a_<msafmt>, msa_fmin_a_<msafmt>,
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 52ddfd8..ac63235 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -549,8 +549,6 @@
(define_mode_iterator VI8F_128 [V2DI V2DF])
(define_mode_iterator VI4F_256 [V8SI V8SF])
(define_mode_iterator VI8F_256 [V4DI V4DF])
-(define_mode_iterator VI8F_256_512
- [V4DI V4DF (V8DI "TARGET_AVX512F") (V8DF "TARGET_AVX512F")])
(define_mode_iterator VI48F_256_512
[V8SI V8SF
(V16SI "TARGET_AVX512F") (V16SF "TARGET_AVX512F")
@@ -17306,43 +17304,43 @@
(set_attr "prefix" "<mask_prefix2>")
(set_attr "mode" "<sseinsnmode>")])
-(define_expand "<avx2_avx512>_perm<mode>"
- [(match_operand:VI8F_256_512 0 "register_operand")
- (match_operand:VI8F_256_512 1 "nonimmediate_operand")
+(define_expand "avx2_perm<mode>"
+ [(match_operand:VI8F_256 0 "register_operand")
+ (match_operand:VI8F_256 1 "nonimmediate_operand")
(match_operand:SI 2 "const_0_to_255_operand")]
"TARGET_AVX2"
{
int mask = INTVAL (operands[2]);
- emit_insn (gen_<avx2_avx512>_perm<mode>_1 (operands[0], operands[1],
- GEN_INT ((mask >> 0) & 3),
- GEN_INT ((mask >> 2) & 3),
- GEN_INT ((mask >> 4) & 3),
- GEN_INT ((mask >> 6) & 3)));
+ emit_insn (gen_avx2_perm<mode>_1 (operands[0], operands[1],
+ GEN_INT ((mask >> 0) & 3),
+ GEN_INT ((mask >> 2) & 3),
+ GEN_INT ((mask >> 4) & 3),
+ GEN_INT ((mask >> 6) & 3)));
DONE;
})
-(define_expand "<avx512>_perm<mode>_mask"
- [(match_operand:VI8F_256_512 0 "register_operand")
- (match_operand:VI8F_256_512 1 "nonimmediate_operand")
+(define_expand "avx512vl_perm<mode>_mask"
+ [(match_operand:VI8F_256 0 "register_operand")
+ (match_operand:VI8F_256 1 "nonimmediate_operand")
(match_operand:SI 2 "const_0_to_255_operand")
- (match_operand:VI8F_256_512 3 "vector_move_operand")
+ (match_operand:VI8F_256 3 "vector_move_operand")
(match_operand:<avx512fmaskmode> 4 "register_operand")]
- "TARGET_AVX512F"
+ "TARGET_AVX512VL"
{
int mask = INTVAL (operands[2]);
emit_insn (gen_<avx2_avx512>_perm<mode>_1_mask (operands[0], operands[1],
- GEN_INT ((mask >> 0) & 3),
- GEN_INT ((mask >> 2) & 3),
- GEN_INT ((mask >> 4) & 3),
- GEN_INT ((mask >> 6) & 3),
- operands[3], operands[4]));
+ GEN_INT ((mask >> 0) & 3),
+ GEN_INT ((mask >> 2) & 3),
+ GEN_INT ((mask >> 4) & 3),
+ GEN_INT ((mask >> 6) & 3),
+ operands[3], operands[4]));
DONE;
})
-(define_insn "<avx2_avx512>_perm<mode>_1<mask_name>"
- [(set (match_operand:VI8F_256_512 0 "register_operand" "=v")
- (vec_select:VI8F_256_512
- (match_operand:VI8F_256_512 1 "nonimmediate_operand" "vm")
+(define_insn "avx2_perm<mode>_1<mask_name>"
+ [(set (match_operand:VI8F_256 0 "register_operand" "=v")
+ (vec_select:VI8F_256
+ (match_operand:VI8F_256 1 "nonimmediate_operand" "vm")
(parallel [(match_operand 2 "const_0_to_3_operand")
(match_operand 3 "const_0_to_3_operand")
(match_operand 4 "const_0_to_3_operand")
@@ -17361,6 +17359,77 @@
(set_attr "prefix" "<mask_prefix2>")
(set_attr "mode" "<sseinsnmode>")])
+(define_expand "avx512f_perm<mode>"
+ [(match_operand:V8FI 0 "register_operand")
+ (match_operand:V8FI 1 "nonimmediate_operand")
+ (match_operand:SI 2 "const_0_to_255_operand")]
+ "TARGET_AVX512F"
+{
+ int mask = INTVAL (operands[2]);
+ emit_insn (gen_avx512f_perm<mode>_1 (operands[0], operands[1],
+ GEN_INT ((mask >> 0) & 3),
+ GEN_INT ((mask >> 2) & 3),
+ GEN_INT ((mask >> 4) & 3),
+ GEN_INT ((mask >> 6) & 3),
+ GEN_INT (((mask >> 0) & 3) + 4),
+ GEN_INT (((mask >> 2) & 3) + 4),
+ GEN_INT (((mask >> 4) & 3) + 4),
+ GEN_INT (((mask >> 6) & 3) + 4)));
+ DONE;
+})
+
+(define_expand "avx512f_perm<mode>_mask"
+ [(match_operand:V8FI 0 "register_operand")
+ (match_operand:V8FI 1 "nonimmediate_operand")
+ (match_operand:SI 2 "const_0_to_255_operand")
+ (match_operand:V8FI 3 "vector_move_operand")
+ (match_operand:<avx512fmaskmode> 4 "register_operand")]
+ "TARGET_AVX512F"
+{
+ int mask = INTVAL (operands[2]);
+ emit_insn (gen_avx512f_perm<mode>_1_mask (operands[0], operands[1],
+ GEN_INT ((mask >> 0) & 3),
+ GEN_INT ((mask >> 2) & 3),
+ GEN_INT ((mask >> 4) & 3),
+ GEN_INT ((mask >> 6) & 3),
+ GEN_INT (((mask >> 0) & 3) + 4),
+ GEN_INT (((mask >> 2) & 3) + 4),
+ GEN_INT (((mask >> 4) & 3) + 4),
+ GEN_INT (((mask >> 6) & 3) + 4),
+ operands[3], operands[4]));
+ DONE;
+})
+
+(define_insn "avx512f_perm<mode>_1<mask_name>"
+ [(set (match_operand:V8FI 0 "register_operand" "=v")
+ (vec_select:V8FI
+ (match_operand:V8FI 1 "nonimmediate_operand" "vm")
+ (parallel [(match_operand 2 "const_0_to_3_operand")
+ (match_operand 3 "const_0_to_3_operand")
+ (match_operand 4 "const_0_to_3_operand")
+ (match_operand 5 "const_0_to_3_operand")
+ (match_operand 6 "const_4_to_7_operand")
+ (match_operand 7 "const_4_to_7_operand")
+ (match_operand 8 "const_4_to_7_operand")
+ (match_operand 9 "const_4_to_7_operand")])))]
+ "TARGET_AVX512F && <mask_mode512bit_condition>
+ && (INTVAL (operands[2]) == (INTVAL (operands[6]) - 4)
+ && INTVAL (operands[3]) == (INTVAL (operands[7]) - 4)
+ && INTVAL (operands[4]) == (INTVAL (operands[8]) - 4)
+ && INTVAL (operands[5]) == (INTVAL (operands[9]) - 4))"
+{
+ int mask = 0;
+ mask |= INTVAL (operands[2]) << 0;
+ mask |= INTVAL (operands[3]) << 2;
+ mask |= INTVAL (operands[4]) << 4;
+ mask |= INTVAL (operands[5]) << 6;
+ operands[2] = GEN_INT (mask);
+ return "vperm<ssemodesuffix>\t{%2, %1, %0<mask_operand10>|%0<mask_operand10>, %1, %2}";
+}
+ [(set_attr "type" "sselog")
+ (set_attr "prefix" "<mask_prefix2>")
+ (set_attr "mode" "<sseinsnmode>")])
+
(define_insn "avx2_permv2ti"
[(set (match_operand:V4DI 0 "register_operand" "=x")
(unspec:V4DI
@@ -17389,7 +17458,7 @@
(define_insn "<avx512>_vec_dup<mode>_1"
[(set (match_operand:VI_AVX512BW 0 "register_operand" "=v,v")
(vec_duplicate:VI_AVX512BW
- (vec_select:VI_AVX512BW
+ (vec_select:<ssescalarmode>
(match_operand:VI_AVX512BW 1 "nonimmediate_operand" "v,m")
(parallel [(const_int 0)]))))]
"TARGET_AVX512F"
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 1ff81d2..636cbee 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2017-03-06 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/79812
+ * gcc.target/i386/avx512f-vpermq-imm-3.c: New test.
+
2017-03-06 Toma Tabacu <toma.tabacu@imgtec.com>
* gcc.target/mips/inline-memcpy-3.c (dg-options): Add -mabi=32.
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpermq-imm-3.c b/gcc/testsuite/gcc.target/i386/avx512f-vpermq-imm-3.c
new file mode 100644
index 0000000..3b1cd9e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vpermq-imm-3.c
@@ -0,0 +1,5 @@
+/* PR target/79812 */
+/* { dg-do compile } */
+/* { dg-options "-O3 -mavx512f" } */
+
+#include "avx512f-vpermq-imm-2.c"
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