Daily bump.

6 files changed, 219 insertions, 1 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a7d51b5..9b70f38 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,151 @@
+2023-06-27  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
+	with base != 0.
+
+2023-06-26  Andrew Pinski  <apinski@marvell.com>
+
+	* doc/extend.texi (access attribute): Add
+	cindex for it.
+	(interrupt/interrupt_handler attribute):
+	Likewise.
+
+2023-06-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
+	Use <DWI> instead of <V2XWIDE>.
+	(aarch64_sqrshrun_n<mode>): Likewise.
+
+2023-06-26  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+	* config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
+	Rename to...
+	(aarch64_rnd_imm_p): ... This.
+	* config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
+	Rename to...
+	(aarch64_int_rnd_operand): ... This.
+	(aarch64_simd_rshrn_imm_vec): Delete.
+	* config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
+	Adjust for the above.
+	(aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
+	(*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
+	(*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
+	(aarch64_sqrshrun_n<mode>_insn): Likewise.
+	(aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
+	(aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
+	(aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
+	(aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
+	* config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
+	Rename to...
+	(aarch64_rnd_imm_p): ... This.
+
+2023-06-26  Andreas Krebbel  <krebbel@linux.ibm.com>
+
+	* config/s390/s390.cc (s390_encode_section_info): Set
+	SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
+	misaligned.
+
+2023-06-26  Jan Hubicka  <jh@suse.cz>
+
+	PR tree-optimization/109849
+	* tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
+	count of newly constructed forwarder block.
+
+2023-06-26  Andrew Carlotti  <andrew.carlotti@arm.com>
+
+	* doc/optinfo.texi: Fix "steam" -> "stream".
+
+2023-06-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+
+	* tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
+	fix LEN_STORE.
+	(dse_optimize_stmt): Add LEN_MASK_STORE.
+
+2023-06-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+
+	* gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
+	fold of LOAD/STORE with length.
+
+2023-06-26  Andrew MacLeod  <amacleod@redhat.com>
+
+	* gimple-range-gori.cc (compute_operand1_and_operand2_range):
+	Check for interdependence between operands 1 and 2.
+
+2023-06-26  Richard Sandiford  <richard.sandiford@arm.com>
+
+	* tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
+	into account when costing non-widening/truncating conversions.
+
+2023-06-26  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/110381
+	* tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
+	Materialize permutes before fold-left reductions.
+
+2023-06-26  Pan Li  <pan2.li@intel.com>
+
+	* config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
+
+2023-06-26  Richard Biener  <rguenther@suse.de>
+
+	* varasm.cc (initializer_constant_valid_p_1): Also
+	constrain the type of value to be scalar integral
+	before dispatching to narrowing_initializer_constant_valid_p.
+
+2023-06-26  Richard Biener  <rguenther@suse.de>
+
+	* tree-ssa-scopedtables.cc (hashable_expr_equal_p):
+	Use element_precision.
+
+2023-06-26  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
+	vcond patterns.
+	(vcondu<V:mode><VI:mode>): Ditto.
+	* config/riscv/riscv-protos.h (expand_vcond): Ditto.
+	* config/riscv/riscv-v.cc (expand_vcond): Ditto.
+
+2023-06-26  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/110392
+	* gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
+	Do early exits on true/false predicate only after normalization.
+
+2023-06-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+
+	* tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
+	"length".
+
+2023-06-26  Roger Sayle  <roger@nextmovesoftware.com>
+
+	* config/i386/i386.md (peephole2): Simplify zeroing a register
+	followed by an IOR, XOR or PLUS operation on it, into a move.
+	(*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
+	eliminate (and hide from reload) unnecessary word to doubleword
+	extensions that are followed by left shifts by sufficiently large,
+	but valid, bit counts.
+
+2023-06-26  liuhongt  <hongtao.liu@intel.com>
+
+	PR tree-optimization/110371
+	PR tree-optimization/110018
+	* tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
+	save intermediate type operand instead of "subtle" vec_dest
+	for case NONE.
+
+2023-06-26  liuhongt  <hongtao.liu@intel.com>
+
+	PR tree-optimization/110371
+	PR tree-optimization/110018
+	* tree-vect-stmts.cc (vectorizable_conversion): Don't use
+	intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
+
+2023-06-26  Hongyu Wang  <hongyu.wang@intel.com>
+
+	* config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
+	Override tune_string with arch_string if tune_string is not
+	explicitly specified.
+
 2023-06-25  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
 
 	* config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 2cf61a4..36a241c 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20230626
+20230627
diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog
index 1247f51..6fd96bf 100644
--- a/gcc/c-family/ChangeLog
+++ b/gcc/c-family/ChangeLog
@@ -1,3 +1,8 @@
+2023-06-26  Richard Biener  <rguenther@suse.de>
+
+	* c-common.cc (shorten_binary_op): Exit early for VECTOR_TYPE
+	operations.
+
 2023-06-23  Marek Polacek  <polacek@redhat.com>
 
 	* c-common.h (cxx_dialect): Add cxx26 as a dialect.
diff --git a/gcc/d/ChangeLog b/gcc/d/ChangeLog
index add8688..ddaa8c3 100644
--- a/gcc/d/ChangeLog
+++ b/gcc/d/ChangeLog
@@ -1,3 +1,10 @@
+2023-06-26  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/110359
+	* d-convert.cc (convert_for_rvalue): Only apply the @safe boolean
+	conversion to boolean fields of a union.
+	(convert_for_condition): Call convert_for_rvalue in the default case.
+
 2023-06-25  Iain Buclaw  <ibuclaw@gdcproject.org>
 
 	* dmd/MERGE: Merge upstream dmd a45f4e9f43.
diff --git a/gcc/go/ChangeLog b/gcc/go/ChangeLog
index 931c3be..432ae83 100644
--- a/gcc/go/ChangeLog
+++ b/gcc/go/ChangeLog
@@ -1,3 +1,12 @@
+2023-06-26  Ian Lance Taylor  <iant@golang.org>
+
+	* lang.opt (fgo-importcfg): New option.
+	* go-c.h (struct go_create_gogo_args): Add importcfg field.
+	* go-lang.cc (go_importcfg): New static variable.
+	(go_langhook_init): Set args.importcfg.
+	(go_langhook_handle_option): Handle -fgo-importcfg.
+	* gccgo.texi (Invoking gccgo): Document -fgo-importcfg.
+
 2023-06-22  Paul E. Murphy  <murphyp@linux.ibm.com>
 
 	* go-backend.cc [TARGET_AIX]: Rename and update usage to TARGET_AIX_OS.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 470cff2..c237f05 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,52 @@
+2023-06-27  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* gcc.target/riscv/rvv/autovec/partial/slp-17.c: New test.
+	* gcc.target/riscv/rvv/autovec/partial/slp-18.c: New test.
+	* gcc.target/riscv/rvv/autovec/partial/slp-19.c: New test.
+	* gcc.target/riscv/rvv/autovec/partial/slp_run-17.c: New test.
+	* gcc.target/riscv/rvv/autovec/partial/slp_run-18.c: New test.
+	* gcc.target/riscv/rvv/autovec/partial/slp_run-19.c: New test.
+
+2023-06-26  Andreas Krebbel  <krebbel@linux.ibm.com>
+
+	* gcc.target/s390/larl-1.c: New test.
+
+2023-06-26  Ju-Zhe Zhong  <juzhe.zhong@rivai.ai>
+
+	* gcc.target/riscv/rvv/autovec/partial/gimple_fold-1.c: New test.
+
+2023-06-26  Richard Biener  <rguenther@suse.de>
+
+	PR tree-optimization/110381
+	* gcc.dg/vect/pr110381.c: New testcase.
+
+2023-06-26  Roger Sayle  <roger@nextmovesoftware.com>
+
+	* gcc.target/i386/ashldi3-1.c: New 32-bit test case.
+	* gcc.target/i386/ashlti3-2.c: New 64-bit test case.
+
+2023-06-26  liuhongt  <hongtao.liu@intel.com>
+
+	* gcc.target/aarch64/pr110371.c: New test.
+
+2023-06-26  liuhongt  <hongtao.liu@intel.com>
+
+	* gcc.target/i386/pr110018-1.c: Add -fno-trapping-math to dg-options.
+	* gcc.target/i386/pr110018-2.c: Ditto.
+
+2023-06-26  Hongyu Wang  <hongyu.wang@intel.com>
+
+	* gcc.target/i386/mvc17.c: New test.
+
+2023-06-26  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
+
+	* gcc.target/riscv/rvv/base/vlmul_ext-2.c: Add -Wno-psabi for dg.
+
+2023-06-26  Iain Buclaw  <ibuclaw@gdcproject.org>
+
+	PR d/110359
+	* gdc.dg/pr110359.d: New test.
+
 2023-06-25  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
 
 	* gcc.target/riscv/rvv/autovec/partial/select_vl-1.c: Add dump checks.