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| author | Nick Clifton <nickc@redhat.com> | 2016-03-30 12:48:42 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@gcc.gnu.org> | 2016-03-30 12:48:42 +0000 |
| commit | 1f73ef6c457df7b00d26dafb68d0a3f5eb28f4f7 (patch) | |
| tree | 234abe964d2af48711cc1b4922b78b206008359c /gcc | |
| parent | 41ec61d3ef99e27e1d2584836ce8c6483c628689 (diff) | |
| download | gcc-1f73ef6c457df7b00d26dafb68d0a3f5eb28f4f7.zip gcc-1f73ef6c457df7b00d26dafb68d0a3f5eb28f4f7.tar.gz gcc-1f73ef6c457df7b00d26dafb68d0a3f5eb28f4f7.tar.bz2 | |
re PR target/62254 (gcc-4.9 ICEs on linux kernel zlib for armv3)
PR target/62254
* config/arm/arm.c (arm_reload_out_hi): Add code to handle the
case where we are already provided with an SImode SUBREG.
From-SVN: r234568
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/arm/arm.c | 21 |
2 files changed, 23 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f09c0a0..641bf25 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2016-03-30 Nick Clifton <nickc@redhat.com> + + PR target/62254 + * config/arm/arm.c (arm_reload_out_hi): Add code to handle the + case where we are already provided with an SImode SUBREG. + 2016-03-30 Michael Matz <matz@suse.de> Richard Biener <rguenther@suse.de> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index c868490..5974c65 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -15596,14 +15596,27 @@ arm_reload_out_hi (rtx *operands) /* The slot is out of range, or was dressed up in a SUBREG. */ base = reg_equiv_address (REGNO (ref)); - /* PR 62554: If there is no equivalent memory location then just move + /* PR 62254: If there is no equivalent memory location then just move the value as an SImode register move. This happens when the target architecture variant does not have an HImode register move. */ if (base == NULL) { - gcc_assert (REG_P (outval)); - emit_insn (gen_movsi (gen_rtx_SUBREG (SImode, ref, 0), - gen_rtx_SUBREG (SImode, outval, 0))); + gcc_assert (REG_P (outval) || SUBREG_P (outval)); + + if (REG_P (outval)) + { + emit_insn (gen_movsi (gen_rtx_SUBREG (SImode, ref, 0), + gen_rtx_SUBREG (SImode, outval, 0))); + } + else /* SUBREG_P (outval) */ + { + if (GET_MODE (SUBREG_REG (outval)) == SImode) + emit_insn (gen_movsi (gen_rtx_SUBREG (SImode, ref, 0), + SUBREG_REG (outval))); + else + /* FIXME: Handle other cases ? */ + gcc_unreachable (); + } return; } } |