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| author | xuli <xuli1@eswincomputing.com> | 2024-05-20 01:56:47 +0000 |
|---|---|---|
| committer | xuli <xuli1@eswincomputing.com> | 2024-05-22 00:53:36 +0000 |
| commit | ffab721f3c9ecbb9831844d844ad257b69a77993 (patch) | |
| tree | c1009450897789db19731c2e96752b01500b65dc /gcc | |
| parent | 292fc21a8d7aa2f16e61ac941e22ada6ddd85500 (diff) | |
| download | gcc-ffab721f3c9ecbb9831844d844ad257b69a77993.zip gcc-ffab721f3c9ecbb9831844d844ad257b69a77993.tar.gz gcc-ffab721f3c9ecbb9831844d844ad257b69a77993.tar.bz2 | |
RISC-V: Enable vectorization for vect-early-break_124-pr114403.c
Because "targetm.slow_unaligned_access" is set to true by default
(aka -mtune=rocket) for RISC-V, it causes the __builtin_memcpy with
8 bytes failed to folded into int64 assignment during ccp1.
So adding "-mtune=generic-ooo" to the RISC-V target can vectorize
vect-early-break_124-pr114403.c.
gcc/testsuite/ChangeLog:
* gcc.dg/vect/vect-early-break_124-pr114403.c: Enable vectrization for RISC-V target.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/gcc.dg/vect/vect-early-break_124-pr114403.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/testsuite/gcc.dg/vect/vect-early-break_124-pr114403.c b/gcc/testsuite/gcc.dg/vect/vect-early-break_124-pr114403.c index 101ae1e..610b951 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-early-break_124-pr114403.c +++ b/gcc/testsuite/gcc.dg/vect/vect-early-break_124-pr114403.c @@ -1,8 +1,9 @@ /* { dg-add-options vect_early_break } */ /* { dg-require-effective-target vect_early_break_hw } */ /* { dg-require-effective-target vect_long_long } */ +/* { dg-additional-options "-mtune=generic-ooo" { target riscv*-*-* } } */ -/* { dg-final { scan-tree-dump "LOOP VECTORIZED" "vect" { xfail riscv*-*-* } } } */ +/* { dg-final { scan-tree-dump "LOOP VECTORIZED" "vect" } } */ #include "tree-vect.h" @@ -74,4 +75,3 @@ int main () return 0; } - |