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| author | YunQiang Su <syq@gcc.gnu.org> | 2024-06-10 14:31:12 +0800 |
|---|---|---|
| committer | YunQiang Su <syq@gcc.gnu.org> | 2024-06-13 09:44:37 +0800 |
| commit | f10896c8e5fe34e51ea61aaa4d4aaedb4677ff13 (patch) | |
| tree | e1de471131976166077e40d6c443ac11d6b177c7 /gcc | |
| parent | e3e5fd0c24c9b82d824da27bf8455bb3654e8eff (diff) | |
| download | gcc-f10896c8e5fe34e51ea61aaa4d4aaedb4677ff13.zip gcc-f10896c8e5fe34e51ea61aaa4d4aaedb4677ff13.tar.gz gcc-f10896c8e5fe34e51ea61aaa4d4aaedb4677ff13.tar.bz2 | |
MIPS: Use FPU-enabled tune for mips32/mips64/mips64r2/mips64r3/mips64r5
Currently, the default tune value of mips32 is PROCESSOR_4KC, and
the default tune value of mips64/mips64r2/mips64r3/mips64r5 is
PROCESSOR_5KC. PROCESSOR_4KC and PROCESSOR_5KC are both FPU-less.
Let's use PROCESSOR_24KF1_1 for mips32, and PROCESSOR_5KF for mips64/
mips64r2/mips64r3/mips64r5.
We find this problem when we try to fix gcc.target/mips/movcc-3.c.
gcc:
* config/mips/mips-cpus.def: Use PROCESSOR_24KF1_1 for mips32;
Use PROCESSOR_5KF for mips64/mips64r2/mips64r3/mips64r5.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/mips/mips-cpus.def | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/gcc/config/mips/mips-cpus.def b/gcc/config/mips/mips-cpus.def index 4901954..17bbba4 100644 --- a/gcc/config/mips/mips-cpus.def +++ b/gcc/config/mips/mips-cpus.def @@ -42,17 +42,17 @@ MIPS_CPU ("mips4", PROCESSOR_R10000, MIPS_ISA_MIPS4, PTF_AVOID_BRANCHLIKELY_SIZE in revisions 2 and earlier, but revision 3 is likely to downgrade that to a recommendation to avoid the instructions in code that isn't tuned to a specific processor. */ -MIPS_CPU ("mips32", PROCESSOR_4KC, MIPS_ISA_MIPS32, PTF_AVOID_BRANCHLIKELY_ALWAYS) +MIPS_CPU ("mips32", PROCESSOR_24KF1_1, MIPS_ISA_MIPS32, PTF_AVOID_BRANCHLIKELY_ALWAYS) MIPS_CPU ("mips32r2", PROCESSOR_74KF2_1, MIPS_ISA_MIPS32R2, PTF_AVOID_BRANCHLIKELY_ALWAYS) /* mips32r3 is micromips hense why it uses the M4K processor. */ MIPS_CPU ("mips32r3", PROCESSOR_M4K, MIPS_ISA_MIPS32R3, PTF_AVOID_BRANCHLIKELY_ALWAYS) MIPS_CPU ("mips32r5", PROCESSOR_P5600, MIPS_ISA_MIPS32R5, PTF_AVOID_BRANCHLIKELY_ALWAYS) MIPS_CPU ("mips32r6", PROCESSOR_I6400, MIPS_ISA_MIPS32R6, 0) -MIPS_CPU ("mips64", PROCESSOR_5KC, MIPS_ISA_MIPS64, PTF_AVOID_BRANCHLIKELY_ALWAYS) +MIPS_CPU ("mips64", PROCESSOR_5KF, MIPS_ISA_MIPS64, PTF_AVOID_BRANCHLIKELY_ALWAYS) /* ??? For now just tune the generic MIPS64r2 and above for 5KC as well. */ -MIPS_CPU ("mips64r2", PROCESSOR_5KC, MIPS_ISA_MIPS64R2, PTF_AVOID_BRANCHLIKELY_ALWAYS) -MIPS_CPU ("mips64r3", PROCESSOR_5KC, MIPS_ISA_MIPS64R3, PTF_AVOID_BRANCHLIKELY_ALWAYS) -MIPS_CPU ("mips64r5", PROCESSOR_5KC, MIPS_ISA_MIPS64R5, PTF_AVOID_BRANCHLIKELY_ALWAYS) +MIPS_CPU ("mips64r2", PROCESSOR_5KF, MIPS_ISA_MIPS64R2, PTF_AVOID_BRANCHLIKELY_ALWAYS) +MIPS_CPU ("mips64r3", PROCESSOR_5KF, MIPS_ISA_MIPS64R3, PTF_AVOID_BRANCHLIKELY_ALWAYS) +MIPS_CPU ("mips64r5", PROCESSOR_5KF, MIPS_ISA_MIPS64R5, PTF_AVOID_BRANCHLIKELY_ALWAYS) MIPS_CPU ("mips64r6", PROCESSOR_I6400, MIPS_ISA_MIPS64R6, 0) /* MIPS I processors. */ |