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authorJeff Law <jlaw@ventanamicro.com>2024-08-21 16:52:23 -0600
committerJeff Law <jlaw@ventanamicro.com>2024-08-21 16:54:01 -0600
commitcdc9cd4afe8949276a0c50215eb7f23e2086044f (patch)
tree997335857e658b06fcb1502f99da336ffcedd78f /gcc
parentec9d6d45191f639482344362d048294e74587ca3 (diff)
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[PR rtl-optimization/116437] Fix RTL checking issue in ext-dce
Another RTL checking failure in ext-dce. An easy one to fix this time. When we optimize an extension we have to go back and cleanup with SUBREG_PROMOTED state. So we record the destination register into a bitmap as we make changes, then later do a single pass over the IL fixing any associated subreg expressions. The optimization is changing the SET_SRC and largely ignores the destination. The LHS could be a REG, SUBREG, or ZERO_EXTRACT. If the LHS is a SUBREG or ZERO_EXTRACT we can just strip them. Bootstrapped and ran the testsuite with an RTL checking compiler and verified no ext-dce RTL checking failures tripped. Also bootstrapped and regression tested x86_64 in the usual way. Pushing to the trunk. PR rtl-optimization/116437 gcc/ * ext-dce.cc (ext_dce_try_optimize_insn): Handle SUBREG and ZERO_EXTRACT destinations.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ext-dce.cc7
1 files changed, 6 insertions, 1 deletions
diff --git a/gcc/ext-dce.cc b/gcc/ext-dce.cc
index eee9208..35c0646 100644
--- a/gcc/ext-dce.cc
+++ b/gcc/ext-dce.cc
@@ -422,8 +422,13 @@ ext_dce_try_optimize_insn (rtx_insn *insn, rtx set)
{
int ok = validate_change (insn, &SET_SRC (set), new_pattern, false);
+ rtx x = SET_DEST (set);
+ while (SUBREG_P (x) || GET_CODE (x) == ZERO_EXTRACT)
+ x = XEXP (x, 0);
+
+ gcc_assert (REG_P (x));
if (ok)
- bitmap_set_bit (changed_pseudos, REGNO (SET_DEST (set)));
+ bitmap_set_bit (changed_pseudos, REGNO (x));
if (dump_file)
{