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| author | Uros Bizjak <ubizjak@gmail.com> | 2023-08-20 17:52:22 +0200 |
|---|---|---|
| committer | Uros Bizjak <ubizjak@gmail.com> | 2023-08-20 17:55:51 +0200 |
| commit | 791952ef4396da74370d28cc3200451080b5c65a (patch) | |
| tree | 788c36b54cd0eb3c891f010fd4db1c5bda0fd91d /gcc | |
| parent | d77c280454cfba48ef38357145cecdabc8c1b05c (diff) | |
| download | gcc-791952ef4396da74370d28cc3200451080b5c65a.zip gcc-791952ef4396da74370d28cc3200451080b5c65a.tar.gz gcc-791952ef4396da74370d28cc3200451080b5c65a.tar.bz2 | |
i386: Micro-optimize ix86_expand_sse_extend
Partial vector src is forced to a register as ops[1], we can use it
instead of SRC in the call to ix86_expand_sse_cmp. This change avoids
forcing operand[1] to a register in sign/zero-extend expanders.
gcc/ChangeLog:
* config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
instead of src in the call to ix86_expand_sse_cmp.
* config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
force operands[1] to a register.
(<any_extend:insn>v4hiv4si2): Ditto.
(<any_extend:insn>v2siv2di2): Ditto.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/i386/i386-expand.cc | 2 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 9 |
2 files changed, 4 insertions, 7 deletions
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc index 460d496..031e2f7 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc @@ -5667,7 +5667,7 @@ ix86_expand_sse_extend (rtx dest, rtx src, bool unsigned_p) ops[2] = force_reg (imode, CONST0_RTX (imode)); else ops[2] = ix86_expand_sse_cmp (gen_reg_rtx (imode), GT, CONST0_RTX (imode), - src, pc_rtx, pc_rtx); + ops[1], pc_rtx, pc_rtx); ix86_split_mmx_punpck (ops, false); emit_move_insn (dest, lowpart_subreg (GET_MODE (dest), ops[0], imode)); diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 87c3bf0..da85223 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -22923,8 +22923,7 @@ { if (!TARGET_SSE4_1) { - rtx op1 = force_reg (V8QImode, operands[1]); - ix86_expand_sse_extend (operands[0], op1, <u_bool>); + ix86_expand_sse_extend (operands[0], operands[1], <u_bool>); DONE; } @@ -23240,8 +23239,7 @@ { if (!TARGET_SSE4_1) { - rtx op1 = force_reg (V4HImode, operands[1]); - ix86_expand_sse_extend (operands[0], op1, <u_bool>); + ix86_expand_sse_extend (operands[0], operands[1], <u_bool>); DONE; } @@ -23846,8 +23844,7 @@ { if (!TARGET_SSE4_1) { - rtx op1 = force_reg (V2SImode, operands[1]); - ix86_expand_sse_extend (operands[0], op1, <u_bool>); + ix86_expand_sse_extend (operands[0], operands[1], <u_bool>); DONE; } |