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| author | Feng Wang <wangfeng@eswincomputing.com> | 2024-01-12 01:35:11 +0000 |
|---|---|---|
| committer | Feng Wang <wangfeng@eswincomputing.com> | 2024-01-12 02:30:48 +0000 |
| commit | 72609f5591b751b34fca3730acaf274c0ba32dab (patch) | |
| tree | 70b8383efe02b03a610075f3055b163310acb0ec /gcc | |
| parent | ee005e72f5fbd258262a93499bdd49a60c0f9714 (diff) | |
| download | gcc-72609f5591b751b34fca3730acaf274c0ba32dab.zip gcc-72609f5591b751b34fca3730acaf274c0ba32dab.tar.gz gcc-72609f5591b751b34fca3730acaf274c0ba32dab.tar.bz2 | |
RISC-V: Modify ABI-name length of vfloat16m8_t
The length of vfloat16m8_t ABI-name should be 17.
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins.def (vfloat16m8_t):
Modify ABI-name length of vfloat16m8_t
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/riscv/riscv-vector-builtins.def | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/riscv/riscv-vector-builtins.def b/gcc/config/riscv/riscv-vector-builtins.def index 055ee8b..784b54c 100644 --- a/gcc/config/riscv/riscv-vector-builtins.def +++ b/gcc/config/riscv/riscv-vector-builtins.def @@ -483,7 +483,7 @@ DEF_RVV_TYPE (vfloat16m4_t, 17, __rvv_float16m4_t, float16, RVVM4HF, _f16m4, /* Define tuple types for SEW = 16, LMUL = M4. */ DEF_RVV_TUPLE_TYPE (vfloat16m4x2_t, 19, __rvv_float16m4x2_t, vfloat16m4_t, float16, 2, _f16m4x2) /* LMUL = 8. */ -DEF_RVV_TYPE (vfloat16m8_t, 16, __rvv_float16m8_t, float16, RVVM8HF, _f16m8, +DEF_RVV_TYPE (vfloat16m8_t, 17, __rvv_float16m8_t, float16, RVVM8HF, _f16m8, _f16, _e16m8) /* Disable all when !TARGET_VECTOR_ELEN_FP_32. */ |