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authorXi Ruoyao <xry111@mengyan1223.wang>2022-03-31 23:40:23 +0800
committerXi Ruoyao <xry111@mengyan1223.wang>2022-04-01 22:37:58 +0800
commit413187b0b3c873333253838e4afbf8463b288b59 (patch)
tree3ff968d0fdb8bbb22496c55fe2a5a7a003dad205 /gcc
parent0d4b97f1ee5213dffce107bc9f260a22fb23b4b1 (diff)
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mips: Ignore zero width fields in arguments and issue -Wpsabi warning about C zero-width field ABI changes [PR102024]
gcc/ PR target/102024 * config/mips/mips.cc (mips_function_arg): Ignore zero-width fields, and inform if it causes a psABI change. gcc/testsuite/ PR target/102024 * gcc.target/mips/pr102024-1.c: New test. * gcc.target/mips/pr102024-2.c: New test. * gcc.target/mips/pr102024-3.c: New test.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/mips/mips.cc46
-rw-r--r--gcc/testsuite/gcc.target/mips/pr102024-1.c20
-rw-r--r--gcc/testsuite/gcc.target/mips/pr102024-2.c20
-rw-r--r--gcc/testsuite/gcc.target/mips/pr102024-3.c20
4 files changed, 102 insertions, 4 deletions
diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc
index 83860b5..7681983 100644
--- a/gcc/config/mips/mips.cc
+++ b/gcc/config/mips/mips.cc
@@ -6042,11 +6042,27 @@ mips_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
for (i = 0; i < info.reg_words; i++)
{
rtx reg;
+ bool zero_width_field_abi_change = false;
for (; field; field = DECL_CHAIN (field))
- if (TREE_CODE (field) == FIELD_DECL
- && int_bit_position (field) >= bitpos)
- break;
+ {
+ if (TREE_CODE (field) != FIELD_DECL)
+ continue;
+
+ /* Ignore zero-width fields. And, if the ignored
+ field is not a C++ zero-width bit-field, it may be
+ an ABI change. */
+ if (DECL_FIELD_CXX_ZERO_WIDTH_BIT_FIELD (field))
+ continue;
+ if (integer_zerop (DECL_SIZE (field)))
+ {
+ zero_width_field_abi_change = true;
+ continue;
+ }
+
+ if (int_bit_position (field) >= bitpos)
+ break;
+ }
if (field
&& int_bit_position (field) == bitpos
@@ -6054,7 +6070,29 @@ mips_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
&& TYPE_PRECISION (TREE_TYPE (field)) == BITS_PER_WORD)
reg = gen_rtx_REG (DFmode, FP_ARG_FIRST + info.reg_offset + i);
else
- reg = gen_rtx_REG (DImode, GP_ARG_FIRST + info.reg_offset + i);
+ {
+ reg = gen_rtx_REG (DImode,
+ GP_ARG_FIRST + info.reg_offset + i);
+ zero_width_field_abi_change = false;
+ }
+
+ if (zero_width_field_abi_change && warn_psabi)
+ {
+ static unsigned last_reported_type_uid;
+ unsigned uid = TYPE_UID (TYPE_MAIN_VARIANT (arg.type));
+ if (uid != last_reported_type_uid)
+ {
+ static const char *url
+ = CHANGES_ROOT_URL
+ "gcc-12/changes.html#mips_zero_width_fields";
+ inform (input_location,
+ "the ABI for passing a value containing "
+ "zero-width fields before an adjacent "
+ "64-bit floating-point field was changed "
+ "in GCC %{12.1%}", url);
+ last_reported_type_uid = uid;
+ }
+ }
XVECEXP (ret, 0, i)
= gen_rtx_EXPR_LIST (VOIDmode, reg,
diff --git a/gcc/testsuite/gcc.target/mips/pr102024-1.c b/gcc/testsuite/gcc.target/mips/pr102024-1.c
new file mode 100644
index 0000000..cf44286
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/pr102024-1.c
@@ -0,0 +1,20 @@
+// PR target/102024
+// { dg-do compile }
+// { dg-options "-mabi=64 -mhard-float" }
+// { dg-final { scan-assembler "\\\$f12" } }
+
+struct foo
+{
+ int : 0;
+ double a;
+};
+
+extern void func(struct foo);
+
+void
+pass_foo(void)
+{
+ struct foo test;
+ test.a = 114;
+ func(test); // { dg-message "the ABI for passing a value containing zero-width fields before an adjacent 64-bit floating-point field was changed in GCC 12.1" }
+}
diff --git a/gcc/testsuite/gcc.target/mips/pr102024-2.c b/gcc/testsuite/gcc.target/mips/pr102024-2.c
new file mode 100644
index 0000000..89b26f8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/pr102024-2.c
@@ -0,0 +1,20 @@
+// PR target/102024
+// { dg-do compile }
+// { dg-options "-mabi=64 -mhard-float" }
+// { dg-final { scan-assembler "\\\$f12" } }
+
+struct foo
+{
+ char empty[0];
+ double a;
+};
+
+extern void func(struct foo);
+
+void
+pass_foo(void)
+{
+ struct foo test;
+ test.a = 114;
+ func(test); // { dg-message "the ABI for passing a value containing zero-width fields before an adjacent 64-bit floating-point field was changed in GCC 12.1" }
+}
diff --git a/gcc/testsuite/gcc.target/mips/pr102024-3.c b/gcc/testsuite/gcc.target/mips/pr102024-3.c
new file mode 100644
index 0000000..477f070
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/pr102024-3.c
@@ -0,0 +1,20 @@
+// PR target/102024
+// { dg-do compile }
+// { dg-options "-mabi=64 -mhard-float" }
+// { dg-final { scan-assembler "\\\$f12" } }
+
+struct foo
+{
+ struct {} empty;
+ double a;
+};
+
+extern void func(struct foo);
+
+void
+pass_foo(void)
+{
+ struct foo test;
+ test.a = 114;
+ func(test); // { dg-message "the ABI for passing a value containing zero-width fields before an adjacent 64-bit floating-point field was changed in GCC 12.1" }
+}