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authorHaochen Jiang <haochen.jiang@intel.com>2024-05-20 15:52:32 +0800
committerHaochen Jiang <haochen.jiang@intel.com>2024-06-03 14:52:52 +0800
commit1f2ca510065a2033bac408eb5a960ef0126f25cc (patch)
tree07ca336d763b2db5451af8bb89027b9af9945c69 /gcc
parent4371ac5292da9eadc3daccbdce2a15c029a04892 (diff)
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Add AVX10.1 target_clones support
Since AVX10 is the first major ISA introduced after AVX-512, we propose to add target_clones support for it. Although AVX10.1-256 won't cover 512-bit part of AVX512F, but since it is only for priority but not for implication, it won't be an issue. gcc/ChangeLog: * common/config/i386/i386-common.cc: Change Granite Rapids series CPU type to P_PROC_AVX10_1_512. * common/config/i386/i386-cpuinfo.h (enum feature_priority): Revise comment part. Add P_AVX10_1_256, P_AVX10_1_512, P_PROC_AVX10_1_512. * common/config/i386/i386-isas.h: Link to avx10.1-256, avx10.1-512. gcc/testsuite/ChangeLog: * gcc.target/i386/avx10_1-25.c: New test. * gcc.target/i386/avx10_1-26.c: Ditto.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/common/config/i386/i386-common.cc4
-rw-r--r--gcc/common/config/i386/i386-cpuinfo.h5
-rw-r--r--gcc/common/config/i386/i386-isas.h4
-rw-r--r--gcc/testsuite/gcc.target/i386/avx10_1-25.c9
-rw-r--r--gcc/testsuite/gcc.target/i386/avx10_1-26.c9
5 files changed, 26 insertions, 5 deletions
diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc
index 895e5fa..5d9c188 100644
--- a/gcc/common/config/i386/i386-common.cc
+++ b/gcc/common/config/i386/i386-common.cc
@@ -2187,10 +2187,10 @@ const pta processor_alias_table[] =
{"meteorlake", PROCESSOR_ALDERLAKE, CPU_HASWELL, PTA_ALDERLAKE,
M_CPU_SUBTYPE (INTEL_COREI7_ALDERLAKE), P_PROC_AVX2},
{"graniterapids", PROCESSOR_GRANITERAPIDS, CPU_HASWELL, PTA_GRANITERAPIDS,
- M_CPU_SUBTYPE (INTEL_COREI7_GRANITERAPIDS), P_PROC_AVX512F},
+ M_CPU_SUBTYPE (INTEL_COREI7_GRANITERAPIDS), P_PROC_AVX10_1_512},
{"graniterapids-d", PROCESSOR_GRANITERAPIDS_D, CPU_HASWELL,
PTA_GRANITERAPIDS_D, M_CPU_SUBTYPE (INTEL_COREI7_GRANITERAPIDS_D),
- P_PROC_AVX512F},
+ P_PROC_AVX10_1_512},
{"arrowlake", PROCESSOR_ARROWLAKE, CPU_HASWELL, PTA_ARROWLAKE,
M_CPU_SUBTYPE (INTEL_COREI7_ARROWLAKE), P_PROC_AVX2},
{"arrowlake-s", PROCESSOR_ARROWLAKE_S, CPU_HASWELL, PTA_ARROWLAKE_S,
diff --git a/gcc/common/config/i386/i386-cpuinfo.h b/gcc/common/config/i386/i386-cpuinfo.h
index 9edad96..3ec9e00 100644
--- a/gcc/common/config/i386/i386-cpuinfo.h
+++ b/gcc/common/config/i386/i386-cpuinfo.h
@@ -110,7 +110,7 @@ enum processor_subtypes
/* Priority of i386 features, greater value is higher priority. This is
used to decide the order in which function dispatch must happen. For
instance, a version specialized for SSE4.2 should be checked for dispatch
- before a version for SSE3, as SSE4.2 implies SSE3. */
+ before a version for SSE3. */
enum feature_priority
{
P_NONE = 0,
@@ -146,6 +146,9 @@ enum feature_priority
P_AVX512F,
P_PROC_AVX512F,
P_X86_64_V4,
+ P_AVX10_1_256,
+ P_AVX10_1_512,
+ P_PROC_AVX10_1_512,
P_PROC_DYNAMIC
};
diff --git a/gcc/common/config/i386/i386-isas.h b/gcc/common/config/i386/i386-isas.h
index 4b4d4b4..2a092f7 100644
--- a/gcc/common/config/i386/i386-isas.h
+++ b/gcc/common/config/i386/i386-isas.h
@@ -184,6 +184,6 @@ ISA_NAMES_TABLE_START
ISA_NAMES_TABLE_ENTRY("apxf", FEATURE_APX_F, P_NONE, "-mapxf")
ISA_NAMES_TABLE_ENTRY("usermsr", FEATURE_USER_MSR, P_NONE, "-musermsr")
ISA_NAMES_TABLE_ENTRY("avx10.1", FEATURE_AVX10_1_256, P_NONE, "-mavx10.1")
- ISA_NAMES_TABLE_ENTRY("avx10.1-256", FEATURE_AVX10_1_256, P_NONE, "-mavx10.1-256")
- ISA_NAMES_TABLE_ENTRY("avx10.1-512", FEATURE_AVX10_1_512, P_NONE, "-mavx10.1-512")
+ ISA_NAMES_TABLE_ENTRY("avx10.1-256", FEATURE_AVX10_1_256, P_AVX10_1_256, "-mavx10.1-256")
+ ISA_NAMES_TABLE_ENTRY("avx10.1-512", FEATURE_AVX10_1_512, P_AVX10_1_512, "-mavx10.1-512")
ISA_NAMES_TABLE_END
diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-25.c b/gcc/testsuite/gcc.target/i386/avx10_1-25.c
new file mode 100644
index 0000000..73f1b72
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx10_1-25.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx" } */
+
+#include <immintrin.h>
+__attribute__((target_clones ("default","avx10.1-256")))
+__m256d foo(__m256d a, __m256d b)
+{
+ return a + b;
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx10_1-26.c b/gcc/testsuite/gcc.target/i386/avx10_1-26.c
new file mode 100644
index 0000000..514ab57
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx10_1-26.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512f" } */
+
+#include <immintrin.h>
+__attribute__((target_clones ("default","avx10.1-512")))
+__m512d foo(__m512d a, __m512d b)
+{
+ return a + b;
+}