re PR target/50788 (ICE: in merge_overlapping_regs, at regrename.c:318 with -mavx -fpeel-loops -fstack-protector-all and __builtin_ia32_maskloadpd256)

	PR target/50788
	* config/i386/sse.md (avx2_maskload<ssemodesuffix><avxsizesuffix>):
	Remove (match_dup 0).
	(*avx2_maskload<ssemodesuffix><avxsizesuffix>): New insn pattern.
	(*avx_maskload<ssemodesuffix><avxsizesuffix>): Ditto.
	(*avx2_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
	(*avx_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
	(*avx2_maskmov<ssemodesuffix><avxsizesuffix>): Remove insn pattern.
	(*avx_maskmov<ssemodesuffix><avxsizesuffix>): Ditto.

testsuite/ChangeLog:

2011-10-23  Uros Bizjak  <ubizjak@gmail.com>

	PR target/50788
	* testsuite/gcc.target/i386/pr50788.c: New test.

From-SVN: r180335

4 files changed, 65 insertions, 16 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fac9fa9..82105b4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2011-10-23  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/50788
+	* config/i386/sse.md (avx2_maskload<ssemodesuffix><avxsizesuffix>):
+	Remove (match_dup 0).
+	(*avx2_maskload<ssemodesuffix><avxsizesuffix>): New insn pattern.
+	(*avx_maskload<ssemodesuffix><avxsizesuffix>): Ditto.
+	(*avx2_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
+	(*avx_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
+	(*avx2_maskmov<ssemodesuffix><avxsizesuffix>): Remove insn pattern.
+	(*avx_maskmov<ssemodesuffix><avxsizesuffix>): Ditto.
+
 2011-10-23  Ira Rosen  <ira.rosen@linaro.org>
 
 	PR tree-optimization/50819
@@ -36,8 +48,7 @@
 
 	* config/c6x/c6x.c (c6x_asm_emit_except_personality,
 	c6x_asm_init_sections): New functions.
-	(TARGET_ASM_EMIT_EXCEPT_PERSONALITY, TARGET_ASM_INIT_SECTIONS):
-	Define.
+	(TARGET_ASM_EMIT_EXCEPT_PERSONALITY, TARGET_ASM_INIT_SECTIONS): Define.
 
 2011-10-21  Jakub Jelinek  <jakub@redhat.com>
 
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index ff77003..e8ac0fe 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -12279,11 +12279,36 @@
   [(set (match_operand:V48_AVX2 0 "register_operand" "")
 	(unspec:V48_AVX2
 	  [(match_operand:<sseintvecmode> 2 "register_operand" "")
-	   (match_operand:V48_AVX2 1 "memory_operand" "")
-	   (match_dup 0)]
+	   (match_operand:V48_AVX2 1 "memory_operand" "")]
 	  UNSPEC_MASKMOV))]
   "TARGET_AVX")
 
+(define_insn "*avx2_maskload<ssemodesuffix><avxsizesuffix>"
+  [(set (match_operand:VI48_AVX2 0 "register_operand" "=x")
+	(unspec:VI48_AVX2
+	  [(match_operand:<sseintvecmode> 1 "register_operand" "x")
+	   (match_operand:VI48_AVX2 2 "memory_operand" "m")]
+	  UNSPEC_MASKMOV))]
+  "TARGET_AVX2"
+  "vpmaskmov<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
+  [(set_attr "type" "sselog1")
+   (set_attr "prefix_extra" "1")
+   (set_attr "prefix" "vex")
+   (set_attr "mode" "<sseinsnmode>")])
+
+(define_insn "*avx_maskload<ssemodesuffix><avxsizesuffix>"
+  [(set (match_operand:VF 0 "register_operand" "=x")
+	(unspec:VF
+	  [(match_operand:<sseintvecmode> 1 "register_operand" "x")
+	   (match_operand:VF 2 "memory_operand" "m")]
+	  UNSPEC_MASKMOV))]
+  "TARGET_AVX"
+  "vmaskmov<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
+  [(set_attr "type" "sselog1")
+   (set_attr "prefix_extra" "1")
+   (set_attr "prefix" "vex")
+   (set_attr "mode" "<MODE>")])
+
 (define_expand "<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>"
   [(set (match_operand:V48_AVX2 0 "memory_operand" "")
 	(unspec:V48_AVX2
@@ -12293,30 +12318,28 @@
 	  UNSPEC_MASKMOV))]
   "TARGET_AVX")
 
-(define_insn "*avx2_maskmov<ssemodesuffix><avxsizesuffix>"
-  [(set (match_operand:VI48_AVX2 0 "nonimmediate_operand" "=x,m")
+(define_insn "*avx2_maskstore<ssemodesuffix><avxsizesuffix>"
+  [(set (match_operand:VI48_AVX2 0 "memory_operand" "=m")
 	(unspec:VI48_AVX2
-	  [(match_operand:<sseintvecmode> 1 "register_operand" "x,x")
-	   (match_operand:VI48_AVX2 2 "nonimmediate_operand" "m,x")
+	  [(match_operand:<sseintvecmode> 1 "register_operand" "x")
+	   (match_operand:VI48_AVX2 2 "register_operand" "x")
 	   (match_dup 0)]
 	  UNSPEC_MASKMOV))]
-  "TARGET_AVX2
-   && (REG_P (operands[0]) == MEM_P (operands[2]))"
+  "TARGET_AVX2"
   "vpmaskmov<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "sselog1")
    (set_attr "prefix_extra" "1")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<sseinsnmode>")])
 
-(define_insn "*avx_maskmov<ssemodesuffix><avxsizesuffix>"
-  [(set (match_operand:VF 0 "nonimmediate_operand" "=x,m")
+(define_insn "*avx_maskstore<ssemodesuffix><avxsizesuffix>"
+  [(set (match_operand:VF 0 "memory_operand" "=m")
 	(unspec:VF
-	  [(match_operand:<sseintvecmode> 1 "register_operand" "x,x")
-	   (match_operand:VF 2 "nonimmediate_operand" "m,x")
+	  [(match_operand:<sseintvecmode> 1 "register_operand" "x")
+	   (match_operand:VF 2 "register_operand" "x")
 	   (match_dup 0)]
 	  UNSPEC_MASKMOV))]
-  "TARGET_AVX
-   && (REG_P (operands[0]) == MEM_P (operands[2]))"
+  "TARGET_AVX"
   "vmaskmov<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
   [(set_attr "type" "sselog1")
    (set_attr "prefix_extra" "1")
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 16b6f6f..0abcb18 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2011-10-23  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/50788
+	* testsuite/gcc.target/i386/pr50788.c: New test.
+
 2011-10-23  Ira Rosen  <ira.rosen@linaro.org>
 
 	PR tree-optimization/50819
diff --git a/gcc/testsuite/gcc.target/i386/pr50788.c b/gcc/testsuite/gcc.target/i386/pr50788.c
new file mode 100644
index 0000000..29a1963
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr50788.c
@@ -0,0 +1,10 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx -fpeel-loops -fstack-protector-all" } */
+
+typedef long long __m256i __attribute__ ((__vector_size__ (32)));
+typedef double __m256d __attribute__ ((__vector_size__ (32)));
+
+__m256d foo (__m256d *__P, __m256i __M)
+{
+  return __builtin_ia32_maskloadpd256 ( __P, __M);
+}