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author | Tamar Christina <tamar.christina@arm.com> | 2018-01-09 11:04:50 +0000 |
---|---|---|
committer | Tamar Christina <tnfchris@gcc.gnu.org> | 2018-01-09 11:04:50 +0000 |
commit | f676330e226a13bdd1602dc392a4491c54237740 (patch) | |
tree | 81bf68359487a9a9b18b3938ef246046365c043a /gcc | |
parent | 1f1229d542a6fe6b992145a6a5760bdb5a59b549 (diff) | |
download | gcc-f676330e226a13bdd1602dc392a4491c54237740.zip gcc-f676330e226a13bdd1602dc392a4491c54237740.tar.gz gcc-f676330e226a13bdd1602dc392a4491c54237740.tar.bz2 |
re PR target/82641 (Unable to enable crc32 for a certain function with target attribute on ARM (aarch32))
2018-01-09 Tamar Christina <tamar.christina@arm.com>
PR target/82641
* gcc.target/arm/pragma_fpu_attribute.c: Rewrite to use
no NEON and require softfp or hard float-abi.
* gcc.target/arm/pragma_fpu_attribute_2.c: Likewise.
From-SVN: r256375
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/testsuite/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/pragma_fpu_attribute.c | 20 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/arm/pragma_fpu_attribute_2.c | 20 |
3 files changed, 29 insertions, 18 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ffade44..56f78da 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2018-01-09 Tamar Christina <tamar.christina@arm.com> + + PR target/82641 + * gcc.target/arm/pragma_fpu_attribute.c: Rewrite to use + no NEON and require softfp or hard float-abi. + * gcc.target/arm/pragma_fpu_attribute_2.c: Likewise. + 2018-01-09 Richard Biener <rguenther@suse.de> PR tree-optimization/83572 diff --git a/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute.c b/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute.c index f47c745..174be85 100644 --- a/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute.c +++ b/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute.c @@ -1,18 +1,20 @@ /* Test for target attribute assembly extension generations. */ /* { dg-do compile } */ -/* { dg-require-effective-target arm_arch_v8a_ok } */ -/* { dg-additional-options "-std=gnu99 -mfpu=vfpv3-d16" } */ +/* { dg-require-effective-target arm_fp_ok } */ +/* { dg-add-options arm_fp } */ #include <stdint.h> -#include <arm_neon.h> -extern uint32_t bar(); +extern uint32_t bar (); -__attribute__((target("fpu=crypto-neon-fp-armv8"))) poly64x1_t vsricw(poly64x1_t crc, uint32_t val) +#pragma GCC target("fpu=vfpv3-d16") + +extern float fmaf (float, float, float); + +float +__attribute__((target("fpu=vfpv4"))) vfma32 (float x, float y, float z) { - poly64x1_t res; - asm("vsri %0, %1, %2" : "=r"(res) : "r"(crc), "r"(val)); - return res; + return fmaf (x, y, z); } uint32_t restored () @@ -20,5 +22,5 @@ uint32_t restored () return bar(); } -/* { dg-final { scan-assembler-times {\.fpu\s+crypto-neon-fp-armv8} 1 } } */ +/* { dg-final { scan-assembler-times {\.fpu\s+vfpv4} 1 } } */ /* { dg-final { scan-assembler-times {\.fpu\s+vfpv3-d16} 1 } } */ diff --git a/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute_2.c b/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute_2.c index f23fd83..add40dd 100644 --- a/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute_2.c +++ b/gcc/testsuite/gcc.target/arm/pragma_fpu_attribute_2.c @@ -1,20 +1,22 @@ /* Test for #pragma assembly extension generations. */ /* { dg-do compile } */ -/* { dg-require-effective-target arm_arch_v8a_ok } */ -/* { dg-additional-options "-std=gnu99 -mfpu=vfpv3-d16" } */ +/* { dg-require-effective-target arm_fp_ok } */ +/* { dg-add-options arm_fp } */ #include <stdint.h> -#include <arm_neon.h> + +#pragma GCC target("fpu=vfpv3-d16") extern uint32_t bar(); #pragma GCC push_options -#pragma GCC target("fpu=crypto-neon-fp-armv8") -poly64x1_t vsricw(poly64x1_t crc, uint32_t val) +#pragma GCC target("fpu=vfpv4") +extern float fmaf (float, float, float); + +float +vfma32 (float x, float y, float z) { - poly64x1_t res; - asm("vsri %0, %1, %2" : "=r"(res) : "r"(crc), "r"(val)); - return res; + return fmaf (x, y, z); } #pragma GCC pop_options @@ -23,5 +25,5 @@ uint32_t restored () return bar(); } -/* { dg-final { scan-assembler-times {\.fpu\s+crypto-neon-fp-armv8} 1 } } */ +/* { dg-final { scan-assembler-times {\.fpu\s+vfpv4} 1 } } */ /* { dg-final { scan-assembler-times {\.fpu\s+vfpv3-d16} 1 } } */ |