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author | Ian Lance Taylor <iant@google.com> | 2012-10-24 04:45:55 +0000 |
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committer | Ian Lance Taylor <ian@gcc.gnu.org> | 2012-10-24 04:45:55 +0000 |
commit | f4b2452702cbc019084dc058e1d995b69f0bb5dc (patch) | |
tree | e8f2937c435e3641ed26e03a0aca936401b43c67 /gcc | |
parent | f6778644d508577e26320e2e8d6f2c13055cbdef (diff) | |
download | gcc-f4b2452702cbc019084dc058e1d995b69f0bb5dc.zip gcc-f4b2452702cbc019084dc058e1d995b69f0bb5dc.tar.gz gcc-f4b2452702cbc019084dc058e1d995b69f0bb5dc.tar.bz2 |
extend.texi (Extended Asm): The '+' constraint does not require a register.
* doc/extend.texi (Extended Asm): The '+' constraint does not
require a register.
From-SVN: r192756
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/doc/extend.texi | 5 |
2 files changed, 6 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index fe52992..9b780ee 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2012-10-23 Ian Lance Taylor <iant@google.com> + + * doc/extend.texi (Extended Asm): The '+' constraint does not + require a register. + 2012-10-23 Jeff Law <law@redhat.com> * tree-ssa-threadedge.c (thread_across_edge): Remove unused diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 6bf929a..fb1becb 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -5864,10 +5864,7 @@ The ordinary output operands must be write-only; GCC will assume that the values in these operands before the instruction are dead and need not be generated. Extended asm supports input-output or read-write operands. Use the constraint character @samp{+} to indicate such an -operand and list it with the output operands. You should only use -read-write operands when the constraints for the operand (or the -operand in which only some of the bits are to be changed) allow a -register. +operand and list it with the output operands. You may, as an alternative, logically split its function into two separate operands, one input operand and one write-only output |