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author | Omar Tahir <omar.tahir@arm.com> | 2020-07-09 10:14:19 +0100 |
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committer | Richard Sandiford <richard.sandiford@arm.com> | 2020-07-09 10:14:19 +0100 |
commit | edf95e51e53697f3050f076675c26a4cece17741 (patch) | |
tree | 5197c9858a0ea13331a4b0d246500dc7a2bc0975 /gcc | |
parent | 319078dad62eba942d33c8975bdcbb09d1c68ba6 (diff) | |
download | gcc-edf95e51e53697f3050f076675c26a4cece17741.zip gcc-edf95e51e53697f3050f076675c26a4cece17741.tar.gz gcc-edf95e51e53697f3050f076675c26a4cece17741.tar.bz2 |
ira: Fix unnecessary register spill
The variables first_moveable_pseudo and last_moveable_pseudo aren't
reset after compiling a function, which means they leak into the first
scheduler pass of the following function. In some cases, this can cause
an extra spill during register allocation of the second function.
gcc/ChangeLog:
* ira.c (move_unallocated_pseudos): Zero first_moveable_pseudo and
last_moveable_pseudo before returning.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/nospill.c: New test.
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ira.c | 2 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/aarch64/nospill.c | 35 |
2 files changed, 37 insertions, 0 deletions
@@ -5126,6 +5126,8 @@ move_unallocated_pseudos (void) INSN_UID (newinsn), i); SET_REG_N_REFS (i, 0); } + + first_moveable_pseudo = last_moveable_pseudo = 0; } /* If the backend knows where to allocate pseudos for hard diff --git a/gcc/testsuite/gcc.target/aarch64/nospill.c b/gcc/testsuite/gcc.target/aarch64/nospill.c new file mode 100644 index 0000000..968a426 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/nospill.c @@ -0,0 +1,35 @@ +/* { dg-do compile } */ +/* { dg-options "-O3" } */ + +/* The pseudo for P is marked as moveable in the IRA pass. */ +float +func_0 (float a, float b, float c) +{ + float p = c / a; + + if (b > 1) + { + b /= p; + if (c > 2) + a /= 3; + } + + return b / c * a; +} + +/* If first_moveable_pseudo and last_moveable_pseudo are not reset correctly, + they will carry over and spill the pseudo for Q. */ +float +func_1 (float a, float b, float c) +{ + float q = a + b; + + c *= a / (b + b); + if (a > 0) + c *= q; + + return a * b * c; +} + +/* We have plenty of spare registers, so check nothing has been spilled. */ +/* { dg-final { scan-assembler-not "\tstr\t" } } */ |