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authorKyrylo Tkachov <kyrylo.tkachov@arm.com>2016-06-06 16:01:47 +0000
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>2016-06-06 16:01:47 +0000
commite8536e2b9f96f42d7f12f13254300476debd283a (patch)
tree45f3b65bf2075b79e7b1b9577f476261830271a0 /gcc
parent3295b529d2fa5affde11526f04248af8f62444ed (diff)
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[2/3][AArch64] Keep CTZ components together until after reload
PR middle-end/37780 * config/aarch64/aarch64.md (ctz<mode>2): Convert to define_insn_and_split. From-SVN: r237139
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/aarch64/aarch64.md25
2 files changed, 22 insertions, 9 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7d8e76b..8a1a2a6 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,6 +1,12 @@
2016-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR middle-end/37780
+ * config/aarch64/aarch64.md (ctz<mode>2): Convert to
+ define_insn_and_split.
+
+2016-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR middle-end/37780
* config/arm/arm.md (ctzsi2): Convert to define_insn_and_split.
2016-06-06 Bernd Edlinger <bernd.edlinger@hotmail.de>
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index f04f7da..dbc52c3 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -3784,16 +3784,23 @@
[(set_attr "type" "rbit")]
)
-(define_expand "ctz<mode>2"
- [(match_operand:GPI 0 "register_operand")
- (match_operand:GPI 1 "register_operand")]
+;; Split after reload into RBIT + CLZ. Since RBIT is represented as an UNSPEC
+;; it is unlikely to fold with any other operation, so keep this as a CTZ
+;; expression and split after reload to enable scheduling them apart if
+;; needed.
+
+(define_insn_and_split "ctz<mode>2"
+ [(set (match_operand:GPI 0 "register_operand" "=r")
+ (ctz:GPI (match_operand:GPI 1 "register_operand" "r")))]
""
- {
- emit_insn (gen_rbit<mode>2 (operands[0], operands[1]));
- emit_insn (gen_clz<mode>2 (operands[0], operands[0]));
- DONE;
- }
-)
+ "#"
+ "reload_completed"
+ [(const_int 0)]
+ "
+ emit_insn (gen_rbit<mode>2 (operands[0], operands[1]));
+ emit_insn (gen_clz<mode>2 (operands[0], operands[0]));
+ DONE;
+")
(define_insn "*and<mode>_compare0"
[(set (reg:CC_NZ CC_REGNUM)