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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2017-06-05 08:46:28 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2017-06-05 08:46:28 +0000 |
| commit | e49d8b68a2330971c75ba7ff625c770e6f2ce2b9 (patch) | |
| tree | be6bd4a64d2062626d61c19853f1a02db7860203 /gcc | |
| parent | 4456f65d431f2869fc4d82f43d05b6ac1c9f568f (diff) | |
| download | gcc-e49d8b68a2330971c75ba7ff625c770e6f2ce2b9.zip gcc-e49d8b68a2330971c75ba7ff625c770e6f2ce2b9.tar.gz gcc-e49d8b68a2330971c75ba7ff625c770e6f2ce2b9.tar.bz2 | |
[AArch64] Peephole for SUBS
* config/aarch64/aarch64.c (define_peephole2 above
*sub_<shift>_<mode>): New peephole.
* gcc.target/aarch64/subs_compare_1.c: New test.
From-SVN: r248869
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.md | 18 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/aarch64/subs_compare_1.c | 15 |
4 files changed, 42 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 037168e..eb7e9ca 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2017-06-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64.c (define_peephole2 above + *sub_<shift>_<mode>): New peephole. + 2017-05-23 Jan Hubicka <hubicka@ucw.cz> * config/i386/i386.c (make_resolver_func): Update. diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 93972d1..475c6d7 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -2234,6 +2234,24 @@ [(set_attr "type" "alus_sreg")] ) +(define_peephole2 + [(set (match_operand:GPI 0 "register_operand") + (minus:GPI (match_operand:GPI 1 "aarch64_reg_or_zero") + (match_operand:GPI 2 "aarch64_reg_or_zero"))) + (set (reg:CC CC_REGNUM) + (compare:CC + (match_dup 1) + (match_dup 2)))] + "!reg_overlap_mentioned_p (operands[0], operands[1]) + && !reg_overlap_mentioned_p (operands[0], operands[2])" + [(const_int 0)] + { + emit_insn (gen_sub<mode>3_compare1 (operands[0], operands[1], + operands[2])); + DONE; + } +) + (define_insn "*sub_<shift>_<mode>" [(set (match_operand:GPI 0 "register_operand" "=r") (minus:GPI (match_operand:GPI 3 "register_operand" "r") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ef8d638..027a802 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2017-06-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * gcc.target/aarch64/subs_compare_1.c: New test. + 2017-06-05 Chenghua Xu <paul.hua.gm@gmail.com> * gcc.target/mips/div-9.c: Delete duplicate test. diff --git a/gcc/testsuite/gcc.target/aarch64/subs_compare_1.c b/gcc/testsuite/gcc.target/aarch64/subs_compare_1.c new file mode 100644 index 0000000..95c8f69 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/subs_compare_1.c @@ -0,0 +1,15 @@ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int +foo (int a, int b) +{ + int x = a - b; + if (a <= b) + return x; + else + return 0; +} + +/* { dg-final { scan-assembler-times "subs\\tw\[0-9\]+, w\[0-9\]+, w\[0-9\]+" 1 } } */ +/* { dg-final { scan-assembler-not "cmp\\tw\[0-9\]+, w\[0-9\]+" } } */ |