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authorAaron Sawdey <acsawdey@linux.ibm.com>2020-07-24 14:13:48 -0500
committerAaron Sawdey <acsawdey@linux.ibm.com>2020-07-26 12:11:47 -0500
commite398fcb9ce8eed5df3bc3ef1549450979028230f (patch)
tree15058516103eefde9fa42b52cdfd26b8ba03fa19 /gcc
parent2e764ae1d666002b136726e6548481013527197d (diff)
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rs6000: add option -mblock-ops-unaligned-vsx
This option is mostly being added to provide -mno-block-ops-unaligned-vsx. The default is set the same as -mefficient-unaligned-vsx. This option will control the use of unaligned VSX loads/stores in the inline expansion of memcpy() and memmove(). The use case for this would be if you're compiling code that is doing a memcpy to memory mapped device memory that is cache-inhibited. On some powerpc processors this requires the unaligned vsx ops to be emulated by the kernel which is very slow. gcc/ChangeLog: * config/rs6000/rs6000.c (rs6000_option_override_internal): Set the default value for -mblock-ops-unaligned-vsx. * config/rs6000/rs6000.opt: Add -mblock-ops-unaligned-vsx. * doc/invoke.texi: Document -mblock-ops-unaligned-vsx.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/rs6000/rs6000.c10
-rw-r--r--gcc/config/rs6000/rs6000.opt4
-rw-r--r--gcc/doc/invoke.texi8
3 files changed, 22 insertions, 0 deletions
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 6bea544..0c7506f 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -3979,6 +3979,14 @@ rs6000_option_override_internal (bool global_init_p)
}
}
+ if (!(rs6000_isa_flags_explicit & OPTION_MASK_BLOCK_OPS_UNALIGNED_VSX))
+ {
+ if (TARGET_EFFICIENT_UNALIGNED_VSX)
+ rs6000_isa_flags |= OPTION_MASK_BLOCK_OPS_UNALIGNED_VSX;
+ else
+ rs6000_isa_flags &= ~OPTION_MASK_BLOCK_OPS_UNALIGNED_VSX;
+ }
+
/* Use long double size to select the appropriate long double. We use
TYPE_PRECISION to differentiate the 3 different long double types. We map
128 into the precision used for TFmode. */
@@ -23167,6 +23175,8 @@ struct rs6000_opt_mask {
static struct rs6000_opt_mask const rs6000_opt_masks[] =
{
{ "altivec", OPTION_MASK_ALTIVEC, false, true },
+ { "block-ops-unaligned-vsx", OPTION_MASK_BLOCK_OPS_UNALIGNED_VSX,
+ false, true },
{ "cmpb", OPTION_MASK_CMPB, false, true },
{ "crypto", OPTION_MASK_CRYPTO, false, true },
{ "direct-move", OPTION_MASK_DIRECT_MOVE, false, true },
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 5910675..9d3e740 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -324,6 +324,10 @@ mblock-move-inline-limit=
Target Report Var(rs6000_block_move_inline_limit) Init(0) RejectNegative Joined UInteger Save
Max number of bytes to move inline.
+mblock-ops-unaligned-vsx
+Target Report Mask(BLOCK_OPS_UNALIGNED_VSX) Var(rs6000_isa_flags)
+Generate unaligned VSX load/store for inline expansion of memcpy/memmove.
+
mblock-compare-inline-limit=
Target Report Var(rs6000_block_compare_inline_limit) Init(63) RejectNegative Joined UInteger Save
Max number of bytes to compare without loops.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index ba18e05..5449c33 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1182,6 +1182,7 @@ See RS/6000 and PowerPC Options.
-mblock-move-inline-limit=@var{num} @gol
-mblock-compare-inline-limit=@var{num} @gol
-mblock-compare-inline-loop-limit=@var{num} @gol
+-mno-block-ops-unaligned-vsx @gol
-mstring-compare-inline-limit=@var{num} @gol
-misel -mno-isel @gol
-mvrsave -mno-vrsave @gol
@@ -27023,6 +27024,13 @@ store instructions when the option @option{-mcpu=future} is used.
@opindex mno-mma
Generate (do not generate) the MMA instructions when the option
@option{-mcpu=future} is used.
+
+@item -mblock-ops-unaligned-vsx
+@itemx -mno-block-ops-unaligned-vsx
+@opindex block-ops-unaligned-vsx
+@opindex no-block-ops-unaligned-vsx
+Generate (do not generate) unaligned vsx loads and stores for
+inline expansion of @code{memcpy} and @code{memmove}.
@end table
@node RX Options