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authorRichard Sandiford <richard.sandiford@linaro.org>2017-10-22 21:07:50 +0000
committerRichard Sandiford <rsandifo@gcc.gnu.org>2017-10-22 21:07:50 +0000
commite10326ff910ab337741d0781a536435d51c5f044 (patch)
treec06a568f9e31903ca74a6e355e410a71dfe83311 /gcc
parentcae115d6d4552a29efb4ea94363d63bde985b4d8 (diff)
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Make more use of subreg_size_lowpart_offset
This patch uses subreg_size_lowpart_offset in places that open-coded the calculation. The reload use (and the LRA one that was based on it) seemed to ignore the BYTES_BIG_ENDIAN != WORDS_BIG_ENDIAN case; it's not obvious whether that was deliberate or an oversight. 2017-10-22 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * lra-spills.c (assign_mem_slot): Use subreg_size_lowpart_offset. * regcprop.c (maybe_mode_change): Likewise. * reload1.c (alter_reg): Likewise. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r253989
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog8
-rw-r--r--gcc/lra-spills.c4
-rw-r--r--gcc/regcprop.c10
-rw-r--r--gcc/reload1.c3
4 files changed, 13 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 47f93c4..d27728d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,4 +1,12 @@
2017-10-22 Richard Sandiford <richard.sandiford@linaro.org>
+ Alan Hayward <alan.hayward@arm.com>
+ David Sherwood <david.sherwood@arm.com>
+
+ * lra-spills.c (assign_mem_slot): Use subreg_size_lowpart_offset.
+ * regcprop.c (maybe_mode_change): Likewise.
+ * reload1.c (alter_reg): Likewise.
+
+2017-10-22 Richard Sandiford <richard.sandiford@linaro.org>
* inchash.h (inchash::hash::add_wide_int): New function.
* lto-streamer-out.c (hash_tree): Use it.
diff --git a/gcc/lra-spills.c b/gcc/lra-spills.c
index ab33dd4..5997b1e 100644
--- a/gcc/lra-spills.c
+++ b/gcc/lra-spills.c
@@ -153,9 +153,7 @@ assign_mem_slot (int i)
/* On a big endian machine, the "address" of the slot is the address
of the low part that fits its inherent mode. */
- if (BYTES_BIG_ENDIAN && inherent_size < total_size)
- adjust += (total_size - inherent_size);
-
+ adjust += subreg_size_lowpart_offset (inherent_size, total_size);
x = adjust_address_nv (x, GET_MODE (regno_reg_rtx[i]), adjust);
/* Set all of the memory attributes as appropriate for a spill. */
diff --git a/gcc/regcprop.c b/gcc/regcprop.c
index 5db5b5d..b80019b 100644
--- a/gcc/regcprop.c
+++ b/gcc/regcprop.c
@@ -407,13 +407,9 @@ maybe_mode_change (machine_mode orig_mode, machine_mode copy_mode,
int use_nregs = hard_regno_nregs (copy_regno, new_mode);
int copy_offset
= GET_MODE_SIZE (copy_mode) / copy_nregs * (copy_nregs - use_nregs);
- int offset
- = GET_MODE_SIZE (orig_mode) - GET_MODE_SIZE (new_mode) - copy_offset;
- int byteoffset = offset % UNITS_PER_WORD;
- int wordoffset = offset - byteoffset;
-
- offset = ((WORDS_BIG_ENDIAN ? wordoffset : 0)
- + (BYTES_BIG_ENDIAN ? byteoffset : 0));
+ unsigned int offset
+ = subreg_size_lowpart_offset (GET_MODE_SIZE (new_mode) + copy_offset,
+ GET_MODE_SIZE (orig_mode));
regno += subreg_regno_offset (regno, orig_mode, offset, new_mode);
if (targetm.hard_regno_mode_ok (regno, new_mode))
return gen_raw_REG (new_mode, regno);
diff --git a/gcc/reload1.c b/gcc/reload1.c
index 5e200b9..27f3716 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -2251,8 +2251,7 @@ alter_reg (int i, int from_reg, bool dont_share_p)
/* On a big endian machine, the "address" of the slot
is the address of the low part that fits its inherent mode. */
- if (BYTES_BIG_ENDIAN && inherent_size < total_size)
- adjust += (total_size - inherent_size);
+ adjust += subreg_size_lowpart_offset (inherent_size, total_size);
/* If we have any adjustment to make, or if the stack slot is the
wrong mode, make a new stack slot. */