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| author | Greta Yorsh <greta.yorsh@arm.com> | 2013-02-22 14:23:12 +0000 |
|---|---|---|
| committer | Greta Yorsh <gretay@gcc.gnu.org> | 2013-02-22 14:23:12 +0000 |
| commit | e023778028bbb434ad2e4297c12b9978b28650e0 (patch) | |
| tree | 8309ade4578be354d6c86dcc7d722fb58ef9aa2a /gcc | |
| parent | f49b31e4594a4a00ac8f9f5aac1f723572fbc95f (diff) | |
| download | gcc-e023778028bbb434ad2e4297c12b9978b28650e0.zip gcc-e023778028bbb434ad2e4297c12b9978b28650e0.tar.gz gcc-e023778028bbb434ad2e4297c12b9978b28650e0.tar.bz2 | |
arm.md (split for extendsidi): Update condition.
2013-02-22 Greta Yorsh <Greta.Yorsh@arm.com>
* config/arm/arm.md (split for extendsidi): Update condition.
(zero_extend<mode>di2,extend<mode>di2): Add an alternative.
* config/arm/iterators.md (qhs_extenddi_cstr): Likewise.
(qhs_zextenddi_cstr): Likewise.
From-SVN: r196220
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/arm/arm.md | 19 | ||||
| -rw-r--r-- | gcc/config/arm/iterators.md | 4 |
3 files changed, 17 insertions, 13 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c2b35d3..79f15be 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2013-02-22 Greta Yorsh <Greta.Yorsh@arm.com> + + * config/arm/arm.md (split for extendsidi): Update condition. + (zero_extend<mode>di2,extend<mode>di2): Add an alternative. + * config/arm/iterators.md (qhs_extenddi_cstr): Likewise. + (qhs_zextenddi_cstr): Likewise. + 2013-02-21 Jakub Jelinek <jakub@redhat.com> PR middle-end/56420 diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 64888f9..f3c59f3 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -4492,36 +4492,35 @@ ;; Zero and sign extension instructions. (define_insn "zero_extend<mode>di2" - [(set (match_operand:DI 0 "s_register_operand" "=w,r,?r") + [(set (match_operand:DI 0 "s_register_operand" "=w,r,?r,w") (zero_extend:DI (match_operand:QHSI 1 "<qhs_zextenddi_op>" "<qhs_zextenddi_cstr>")))] "TARGET_32BIT <qhs_zextenddi_cond>" "#" - [(set_attr "length" "8,4,8") + [(set_attr "length" "8,4,8,8") + (set_attr "arch" "neon_nota8,*,*,neon_onlya8") (set_attr "ce_count" "2") (set_attr "predicable" "yes")] ) (define_insn "extend<mode>di2" - [(set (match_operand:DI 0 "s_register_operand" "=w,r,?r,?r") + [(set (match_operand:DI 0 "s_register_operand" "=w,r,?r,?r,w") (sign_extend:DI (match_operand:QHSI 1 "<qhs_extenddi_op>" "<qhs_extenddi_cstr>")))] "TARGET_32BIT <qhs_sextenddi_cond>" "#" - [(set_attr "length" "8,4,8,8") + [(set_attr "length" "8,4,8,8,8") (set_attr "ce_count" "2") (set_attr "shift" "1") (set_attr "predicable" "yes") - (set_attr "arch" "*,*,a,t")] + (set_attr "arch" "neon_nota8,*,a,t,neon_onlya8")] ) ;; Splits for all extensions to DImode (define_split [(set (match_operand:DI 0 "s_register_operand" "") (zero_extend:DI (match_operand 1 "nonimmediate_operand" "")))] - "TARGET_32BIT && (!TARGET_NEON - || (reload_completed - && !(IS_VFP_REGNUM (REGNO (operands[0])))))" + "TARGET_32BIT && reload_completed && !IS_VFP_REGNUM (REGNO (operands[0]))" [(set (match_dup 0) (match_dup 1))] { rtx lo_part = gen_lowpart (SImode, operands[0]); @@ -4547,9 +4546,7 @@ (define_split [(set (match_operand:DI 0 "s_register_operand" "") (sign_extend:DI (match_operand 1 "nonimmediate_operand" "")))] - "TARGET_32BIT && (!TARGET_NEON - || (reload_completed - && !(IS_VFP_REGNUM (REGNO (operands[0])))))" + "TARGET_32BIT && reload_completed && !IS_VFP_REGNUM (REGNO (operands[0]))" [(set (match_dup 0) (ashiftrt:SI (match_dup 1) (const_int 31)))] { rtx lo_part = gen_lowpart (SImode, operands[0]); diff --git a/gcc/config/arm/iterators.md b/gcc/config/arm/iterators.md index ea0e483..252f18b 100644 --- a/gcc/config/arm/iterators.md +++ b/gcc/config/arm/iterators.md @@ -429,8 +429,8 @@ (define_mode_attr qhs_extenddi_op [(SI "s_register_operand") (HI "nonimmediate_operand") (QI "arm_reg_or_extendqisi_mem_op")]) -(define_mode_attr qhs_extenddi_cstr [(SI "r,0,r,r") (HI "r,0,rm,rm") (QI "r,0,rUq,rm")]) -(define_mode_attr qhs_zextenddi_cstr [(SI "r,0,r") (HI "r,0,rm") (QI "r,0,rm")]) +(define_mode_attr qhs_extenddi_cstr [(SI "r,0,r,r,r") (HI "r,0,rm,rm,r") (QI "r,0,rUq,rm,r")]) +(define_mode_attr qhs_zextenddi_cstr [(SI "r,0,r,r") (HI "r,0,rm,r") (QI "r,0,rm,r")]) ;; Mode attributes used for fixed-point support. (define_mode_attr qaddsub_suf [(V4UQQ "8") (V2UHQ "16") (UQQ "8") (UHQ "16") |