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| author | Alan Modra <amodra@gmail.com> | 2020-10-26 21:51:31 +1030 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2020-10-27 09:25:23 +1030 |
| commit | d7c71335c2a5bd65ee36b927af83ef97a1e06620 (patch) | |
| tree | 6082e1566611782b1058d6528f70748df468ab98 /gcc | |
| parent | 99f68181b11021f92f9f41324d16ad22fbc8c57e (diff) | |
| download | gcc-d7c71335c2a5bd65ee36b927af83ef97a1e06620.zip gcc-d7c71335c2a5bd65ee36b927af83ef97a1e06620.tar.gz gcc-d7c71335c2a5bd65ee36b927af83ef97a1e06620.tar.bz2 | |
[RS6000] Replace -mcpu with -mdejagnu-cpu
* gcc.target/powerpc/pr93122.c: Replace -mcpu with -mdejagnu-cpu.
* gcc.target/powerpc/vsx_mask-count-runnable.c: Likewise.
* gcc.target/powerpc/vsx_mask-expand-runnable.c: Likewise.
* gcc.target/powerpc/vsx_mask-extract-runnable.c: Likewise.
* gcc.target/powerpc/vsx_mask-move-runnable.c: Likewise.
Diffstat (limited to 'gcc')
5 files changed, 5 insertions, 5 deletions
diff --git a/gcc/testsuite/gcc.target/powerpc/pr93122.c b/gcc/testsuite/gcc.target/powerpc/pr93122.c index 8ea4eb6..97bcb0c 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr93122.c +++ b/gcc/testsuite/gcc.target/powerpc/pr93122.c @@ -1,7 +1,7 @@ /* PR target/93122 */ /* { dg-require-effective-target power10_ok } */ /* { dg-do compile { target lp64 } } */ -/* { dg-options "-fstack-clash-protection -mprefixed -mcpu=power10" } */ +/* { dg-options "-fstack-clash-protection -mprefixed -mdejagnu-cpu=power10" } */ void bar (char *); diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_mask-count-runnable.c b/gcc/testsuite/gcc.target/powerpc/vsx_mask-count-runnable.c index 6ac4ed2..6aa165c 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx_mask-count-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx_mask-count-runnable.c @@ -1,6 +1,6 @@ /* { dg-do run { target { power10_hw } } } */ /* { dg-do link { target { ! power10_hw } } } */ -/* { dg-options "-mcpu=power10 -O2" } */ +/* { dg-options "-mdejagnu-cpu=power10 -O2" } */ /* { dg-require-effective-target { int128 && power10_ok } } */ /* Check that the expected 128-bit instructions are generated if the processor diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_mask-expand-runnable.c b/gcc/testsuite/gcc.target/powerpc/vsx_mask-expand-runnable.c index 05fedf7..9fdfa4a 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx_mask-expand-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx_mask-expand-runnable.c @@ -1,6 +1,6 @@ /* { dg-do run { target { power10_hw } } } */ /* { dg-do link { target { ! power10_hw } } } */ -/* { dg-options "-mcpu=power10 -O2" } */ +/* { dg-options "-mdejagnu-cpu=power10 -O2" } */ /* { dg-require-effective-target { int128 && power10_ok } } */ /* Check that the expected 128-bit instructions are generated if the processor diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_mask-extract-runnable.c b/gcc/testsuite/gcc.target/powerpc/vsx_mask-extract-runnable.c index 6e95269..a038e56 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx_mask-extract-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx_mask-extract-runnable.c @@ -1,6 +1,6 @@ /* { dg-do run { target { power10_hw } } } */ /* { dg-do link { target { ! power10_hw } } } */ -/* { dg-options "-mcpu=power10 -O2" } */ +/* { dg-options "-mdejagnu-cpu=power10 -O2" } */ /* { dg-require-effective-target { int128 && power10_ok } } */ /* Check that the expected 128-bit instructions are generated if the processor diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_mask-move-runnable.c b/gcc/testsuite/gcc.target/powerpc/vsx_mask-move-runnable.c index c2eb53d..6f87e60 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx_mask-move-runnable.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx_mask-move-runnable.c @@ -1,6 +1,6 @@ /* { dg-do run { target { power10_hw } } } */ /* { dg-do link { target { ! power10_hw } } } */ -/* { dg-options "-mcpu=power10 -O2" } */ +/* { dg-options "-mdejagnu-cpu=power10 -O2" } */ /* { dg-require-effective-target { int128 && power10_ok } } */ /* Check that the expected 128-bit instructions are generated if the processor |