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| author | David Edelsohn <edelsohn@gnu.org> | 2003-02-27 21:03:36 +0000 |
|---|---|---|
| committer | David Edelsohn <dje@gcc.gnu.org> | 2003-02-27 16:03:36 -0500 |
| commit | d47719fd9db5fc2c09bc6a6ccf8c0d15f485ac18 (patch) | |
| tree | 46a549f12ccecf13d215eb0951c87324a2e27b7d /gcc | |
| parent | 7a69a172d023724ba7b0e5678627bc3d8f3ff222 (diff) | |
| download | gcc-d47719fd9db5fc2c09bc6a6ccf8c0d15f485ac18.zip gcc-d47719fd9db5fc2c09bc6a6ccf8c0d15f485ac18.tar.gz gcc-d47719fd9db5fc2c09bc6a6ccf8c0d15f485ac18.tar.bz2 | |
* config/rs6000/power4.md: Additional VMX bypasses.
From-SVN: r63525
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/rs6000/power4.md | 23 |
2 files changed, 22 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 65a96ed..0a7e68a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2003-02-27 David Edelsohn <edelsohn@gnu.org> + + * config/rs6000/power4.md: Additional VMX bypasses. + 2003-02-27 Geert Bosch <bosch@gnat.com> * toplev.c (print_version): Add indentation for GGC heuristics and diff --git a/gcc/config/rs6000/power4.md b/gcc/config/rs6000/power4.md index 73a7985..c1c52f9 100644 --- a/gcc/config/rs6000/power4.md +++ b/gcc/config/rs6000/power4.md @@ -277,8 +277,13 @@ ; VMX -(define_insn_reservation "power4-vec" 2 - (and (eq_attr "type" "vecsimple,veccomplex") +(define_insn_reservation "power4-vecsimple" 2 + (and (eq_attr "type" "vecsimple") + (eq_attr "cpu" "power4")) + "vq_power4") + +(define_insn_reservation "power4-veccomplex" 2 + (and (eq_attr "type" "veccomplex") (eq_attr "cpu" "power4")) "vq_power4") @@ -299,7 +304,15 @@ "vpq_power4") (define_bypass 4 "power4-vecload" "power4-vecperm") -(define_bypass 5 "power4-vec" + +(define_bypass 3 "power4-vecsimple,power4-veccomplex" "power4-vecperm") +(define_bypass 3 "power4-vecperm" + "power4-vecsimple,power4-veccomplex,power4-vecfloat") +(define_bypass 9 "power4-vecfloat" "power4-vecperm") + +(define_bypass 5 "power4-vecsimple,power4-veccomplex" "power4-branch,power4-crlogical,power4-delayedcr,power4-mfcr") -(define_bypass 3 "power4-vec,power4-vecfloat" "power4-vecperm") -(define_bypass 3 "power4-vecperm" "power4-vec,power4-vecfloat") + +(define_bypass 4 "power4-vecsimple,power4-vecperm" "power4-vecstore") +(define_bypass 7 "power4-veccomplex" "power4-vecstore") +(define_bypass 10 "power4-vecfloat" "power4-vecstore") |