diff options
author | Vladimir Makarov <vmakarov@toad.to.cygnus.com> | 1999-07-27 19:44:41 +0000 |
---|---|---|
committer | Vladimir Makarov <vmakarov@gcc.gnu.org> | 1999-07-27 19:44:41 +0000 |
commit | d3ec6b06ee02cb1084919ef4be2d794c435e270b (patch) | |
tree | 8ef5b215267baff28c01ee48cbd0ec4c916bf231 /gcc | |
parent | 83f2ccf4f874f0ec4deb560b82ac87a171bf6617 (diff) | |
download | gcc-d3ec6b06ee02cb1084919ef4be2d794c435e270b.zip gcc-d3ec6b06ee02cb1084919ef4be2d794c435e270b.tar.gz gcc-d3ec6b06ee02cb1084919ef4be2d794c435e270b.tar.bz2 |
sparc.c (sparc_override_options): Enable SPARCLITE instead of V8 for sparclite86x in cpu_table.
Tue Jul 27 15:31:53 1999 Vladimir Makarov <vmakarov@toad.to.cygnus.com>
* config/sparc/sparc.c (sparc_override_options): Enable SPARCLITE
instead of V8 for sparclite86x in cpu_table.
From-SVN: r28299
Diffstat (limited to 'gcc')
-rw-r--r-- | gcc/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/config/sparc/sparc.c | 3 |
2 files changed, 7 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e5a9e5d..ebbf776 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +Tue Jul 27 15:31:53 1999 Vladimir Makarov <vmakarov@toad.to.cygnus.com> + + * config/sparc/sparc.c (sparc_override_options): Enable SPARCLITE + instead of V8 for sparclite86x in cpu_table. + Tue Jul 27 17:49:42 1999 Bernd Schmidt <bernds@cygnus.co.uk> * config/arm/coff.h (ASM_FILE_START): If generating SDB output, call diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 2609bf4..da57564 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -207,7 +207,8 @@ sparc_override_options () { "f930", PROCESSOR_F930, MASK_ISA|MASK_FPU, MASK_SPARCLITE }, { "f934", PROCESSOR_F934, MASK_ISA, MASK_SPARCLITE|MASK_FPU }, { "hypersparc", PROCESSOR_HYPERSPARC, MASK_ISA, MASK_V8|MASK_FPU }, - { "sparclite86x", PROCESSOR_SPARCLITE86X, MASK_ISA|MASK_FPU, MASK_V8 }, + { "sparclite86x", PROCESSOR_SPARCLITE86X, MASK_ISA|MASK_FPU, + MASK_SPARCLITE }, { "sparclet", PROCESSOR_SPARCLET, MASK_ISA, MASK_SPARCLET }, /* TEMIC sparclet */ { "tsc701", PROCESSOR_TSC701, MASK_ISA, MASK_SPARCLET }, |