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authorRichard Kenner <kenner@gcc.gnu.org>1995-01-07 20:45:37 -0500
committerRichard Kenner <kenner@gcc.gnu.org>1995-01-07 20:45:37 -0500
commitd28899393c6ba9503dda9dd66bfe864acac90dad (patch)
treecb011eadba668a4687c6b6cc8f5b43cd7fb25658 /gcc
parent175a444d3f1456071b956446cf50237157e71f29 (diff)
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(order_regs_for_local_alloc): Add casts to bcopy call.
(print_operand, case 'f'): New case. (sparc_initialize_trampoline): Use gen_flush instead of knowing what pattern looks like. Use MEM instead of address in flush insn, so virtual reg instantiation can update. Ensure address in flush insn is valid. From-SVN: r8727
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/sparc/sparc.c30
1 files changed, 16 insertions, 14 deletions
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 6eb922a..842276e 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -1,5 +1,5 @@
/* Subroutines for insn-output.c for Sun SPARC.
- Copyright (C) 1987, 88, 89, 92, 93, 1994 Free Software Foundation, Inc.
+ Copyright (C) 1987, 88, 89, 92, 93, 94, 1995 Free Software Foundation, Inc.
Contributed by Michael Tiemann (tiemann@cygnus.com)
64 bit SPARC V9 support by Michael Tiemann, Jim Wilson, and Doug Evans,
at Cygnus Support.
@@ -3517,8 +3517,8 @@ order_regs_for_local_alloc ()
if (regs_ever_live[15] != last_order_nonleaf)
{
last_order_nonleaf = !last_order_nonleaf;
- bcopy (reg_alloc_orders[last_order_nonleaf], reg_alloc_order,
- FIRST_PSEUDO_REGISTER * sizeof (int));
+ bcopy ((char *) reg_alloc_orders[last_order_nonleaf],
+ (char *) reg_alloc_order, FIRST_PSEUDO_REGISTER * sizeof (int));
}
}
@@ -3779,6 +3779,13 @@ print_operand (file, x, code)
return;
}
+ case 'f':
+ /* Operand must be a MEM; write its address. */
+ if (GET_CODE (x) != MEM)
+ output_operand_lossage ("Invalid %%f operand");
+ output_address (XEXP (x, 0));
+ return;
+
case 0:
/* Do nothing special. */
break;
@@ -4044,8 +4051,7 @@ sparc_type_code (type)
(to store insns). This is a bit excessive. Perhaps a different
mechanism would be better here.
- Emit 3 FLUSH instructions (UNSPEC_VOLATILE 3) to synchonize the data
- and instruction caches.
+ Emit 3 FLUSH instructions to synchonize the data and instruction caches.
??? v9: We assume the top 32 bits of function addresses are 0. */
@@ -4080,15 +4086,11 @@ sparc_initialize_trampoline (tramp, fnaddr, cxt)
emit_move_insn (tem, g2_ori);
emit_insn (gen_iorsi3 (low_cxt, low_cxt, tem));
emit_move_insn (gen_rtx (MEM, SImode, plus_constant (tramp, 16)), low_cxt);
- emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode,
- gen_rtvec (1, plus_constant (tramp, 0)),
- 3));
- emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode,
- gen_rtvec (1, plus_constant (tramp, 8)),
- 3));
- emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode,
- gen_rtvec (1, plus_constant (tramp, 16)),
- 3));
+ emit_insn (gen_flush (validize_mem (gen_rtx (MEM, SImode, tramp))));
+ emit_insn (gen_flush (validize_mem (gen_rtx (MEM, SImode,
+ plus_constant (tramp, 8)))));
+ emit_insn (gen_flush (validize_mem (gen_rtx (MEM, SImode,
+ plus_constant (tramp, 16)))));
}
void