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| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2016-05-24 14:04:03 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2016-05-24 14:04:03 +0000 |
| commit | d1fb69400edb679142810fb86cc4c80254c60787 (patch) | |
| tree | 9d2b0bb2933f03a275856f4436d5f7008cfd233c /gcc | |
| parent | dec21bbc9773ebe3e066109b00d1fbeee0b18581 (diff) | |
| download | gcc-d1fb69400edb679142810fb86cc4c80254c60787.zip gcc-d1fb69400edb679142810fb86cc4c80254c60787.tar.gz gcc-d1fb69400edb679142810fb86cc4c80254c60787.tar.bz2 | |
[ARM][4/4] Simplify checks for CONST_INT_P and comparison against 1/0
* config/arm/neon.md (ashldi3_neon): Replace comparison of INTVAL of
operands[2] against 1 with comparison against CONST1_RTX.
(<shift>di3_neon): Likewise.
* config/arm/predicates.md (const0_operand): Replace with comparison
against CONST0_RTX.
From-SVN: r236641
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/arm/neon.md | 4 | ||||
| -rw-r--r-- | gcc/config/arm/predicates.md | 3 |
3 files changed, 11 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a932987..a76178e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,13 @@ 2016-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + * config/arm/neon.md (ashldi3_neon): Replace comparison of INTVAL of + operands[2] against 1 with comparison against CONST1_RTX. + (<shift>di3_neon): Likewise. + * config/arm/predicates.md (const0_operand): Replace with comparison + against CONST0_RTX. + +2016-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + * config/arm/arm.md (ashldi3): Replace comparison of INTVAL of operands[2] against 1 with comparison against CONST1_RTX. (ashrdi3): Likewise. diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 21eed7b..e2fdfbb 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -1082,7 +1082,7 @@ } else { - if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 1 + if (operands[2] == CONST1_RTX (SImode) && (!reg_overlap_mentioned_p (operands[0], operands[1]) || REGNO (operands[0]) == REGNO (operands[1]))) /* This clobbers CC. */ @@ -1184,7 +1184,7 @@ } else { - if (CONST_INT_P (operands[2]) && INTVAL (operands[2]) == 1 + if (operands[2] == CONST1_RTX (SImode) && (!reg_overlap_mentioned_p (operands[0], operands[1]) || REGNO (operands[0]) == REGNO (operands[1]))) /* This clobbers CC. */ diff --git a/gcc/config/arm/predicates.md b/gcc/config/arm/predicates.md index 4b4b4fe..4504ecc 100644 --- a/gcc/config/arm/predicates.md +++ b/gcc/config/arm/predicates.md @@ -141,8 +141,7 @@ (match_test "const_ok_for_arm (~INTVAL (op))"))) (define_predicate "const0_operand" - (and (match_code "const_int") - (match_test "INTVAL (op) == 0"))) + (match_test "op == CONST0_RTX (mode)")) ;; Something valid on the RHS of an ARM data-processing instruction (define_predicate "arm_rhs_operand" |