mn10300.c (notice_update_cc): Use CC_SET_ZN and CC_SET_ZNV.

        * mn10300.c (notice_update_cc): Use CC_SET_ZN and CC_SET_ZNV.
        * mn10300.h (CC_NO_CARRY): Define.
        * mn10300.md: Use "set_zn" and "set_znv" to more accurately
        describe cc0 status.

From-SVN: r14019

3 files changed, 32 insertions, 32 deletions

diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c
index bbfb68e..d6fd820 100644
--- a/gcc/config/mn10300/mn10300.c
+++ b/gcc/config/mn10300/mn10300.c
@@ -596,18 +596,19 @@ notice_update_cc (body, insn)
 	cc_status.value1 = 0;
       break;
 
-    case CC_SET_ZN_C0:
+    case CC_SET_ZN:
       /* Insn sets the Z,N flags of CC to recog_operand[0].
-	 V is always set to 0.  C may or may not be set to 0 but that's ok
-	 because alter_cond will change tests to use EQ/NE.  */
+	 V,C are unusable.  */
       CC_STATUS_INIT;
-      cc_status.flags |= CC_NO_OVERFLOW | CC_OVERFLOW_UNUSABLE;
+      cc_status.flags |= CC_NO_CARRY | CC_OVERFLOW_UNUSABLE;
       cc_status.value1 = recog_operand[0];
       break;
 
-    case CC_TST:
-      /* The insn sets all the condition codes, except v is bogus.  */
+    case CC_SET_ZNV:
+      /* Insn sets the Z,N,V flags of CC to recog_operand[0].
+	 C is unusable.  */
       CC_STATUS_INIT;
+      cc_status.flags |= CC_NO_CARRY;
       cc_status.value1 = recog_operand[0];
       break;
 
diff --git a/gcc/config/mn10300/mn10300.h b/gcc/config/mn10300/mn10300.h
index b24f6b4..88065a2 100644
--- a/gcc/config/mn10300/mn10300.h
+++ b/gcc/config/mn10300/mn10300.h
@@ -709,6 +709,7 @@ extern struct rtx_def *mn10300_builtin_saveregs ();
    Do not alter them if the instruction would not alter the cc's.  */
 
 #define CC_OVERFLOW_UNUSABLE 0x200
+#define CC_NO_CARRY CC_NO_OVERFLOW
 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
 
 /* Compute the cost of computing a constant rtl expression RTX
diff --git a/gcc/config/mn10300/mn10300.md b/gcc/config/mn10300/mn10300.md
index 9f1d917..bcea258 100644
--- a/gcc/config/mn10300/mn10300.md
+++ b/gcc/config/mn10300/mn10300.md
@@ -30,14 +30,12 @@
 ;; none_0hit - insn does not affect cc but it does modify operand 0
 ;;	This attribute is used to keep track of when operand 0 changes.
 ;; 	See the description of NOTICE_UPDATE_CC for more info.
-;; set - insn sets flags z,n.  v is unusable c is set to 0.
-;;	(c may not really be set to 0 but that's ok, we don't need it anyway).
-;; set_zn_c0 - insn sets z,n to usable values.  v is unknown.  c may or may not
-;;	be known (if it isn't that's ok, we don't need it anyway).
+;; set_znv - insn sets z,n,v to useable values; c is unusable.
+;; set_zn  - insn sets z,n to useable values; v,c are unuseable.
 ;; compare - compare instruction
 ;; invert -- like compare, but flags are inverted.
 ;; clobber - value of cc is unknown
-(define_attr "cc" "none,none_0hit,tst,set_zn_c0,compare,clobber,invert"
+(define_attr "cc" "none,none_0hit,set_znv,set_zn,compare,clobber,invert"
   (const_string "clobber"))
 
 ;; ----------------------------------------------------------------------
@@ -620,19 +618,19 @@
   [(set (cc0) (match_operand:SI 0 "register_operand" "da"))]
   ""
   "* return output_tst (operands[0], insn);"
-  [(set_attr "cc" "tst")])
+  [(set_attr "cc" "set_znv")])
 
 (define_insn ""
   [(set (cc0) (zero_extend:SI (match_operand:QI 0 "memory_operand" "d")))]
   ""
   "* return output_tst (operands[0], insn);"
-  [(set_attr "cc" "tst")])
+  [(set_attr "cc" "set_znv")])
 
 (define_insn ""
   [(set (cc0) (zero_extend:SI (match_operand:HI 0 "memory_operand" "d")))]
   ""
   "* return output_tst (operands[0], insn);"
-  [(set_attr "cc" "tst")])
+  [(set_attr "cc" "set_znv")])
 
 
 (define_insn "cmpsi"
@@ -681,7 +679,7 @@
   add %2,%0
   add %2,%0
   mov %2,%0\;add %1,%0"
-  [(set_attr "cc" "set_zn_c0,none_0hit,none_0hit,set_zn_c0,none_0hit,set_zn_c0")])
+  [(set_attr "cc" "set_zn,none_0hit,none_0hit,set_zn,none_0hit,set_zn")])
 
 (define_expand "adddi3"
   [(set (reg:DI 0) (match_operand:DI 1 "register_operand" ""))
@@ -735,7 +733,7 @@
 		  (match_operand:SI 2 "nonmemory_operand" "dai")))]
   ""
   "sub %2,%0"
-  [(set_attr "cc" "set_zn_c0")])
+  [(set_attr "cc" "set_zn")])
 
 (define_expand "negsi2"
   [(set (match_operand:SI 0 "register_operand" "")
@@ -775,7 +773,7 @@
 		 (match_operand:SI 2 "register_operand" "d")))]
   ""
   "mul %2,%0"
-  [(set_attr "cc" "set_zn_c0")])
+  [(set_attr "cc" "set_zn")])
 
 (define_expand "udivmodsi4"
   [(parallel [(set (match_operand:SI 0 "register_operand" "")
@@ -805,7 +803,7 @@
   else
     return \"divu %2,%0\;mov mdr,%3\";
 }"
-  [(set_attr "cc" "set_zn_c0")])
+  [(set_attr "cc" "set_zn")])
 
 (define_expand "divmodsi4"
   [(parallel [(set (match_operand:SI 0 "register_operand" "")
@@ -830,7 +828,7 @@
   else
     return \"ext %0\;div %2,%0\;mov mdr,%3\";
 }"
-  [(set_attr "cc" "set_zn_c0")])
+  [(set_attr "cc" "set_zn")])
 
 (define_insn "clear_mdr"
   [(unspec_volatile [(const_int 2)] 0)
@@ -872,7 +870,7 @@
     return \"lsr 4,%0\;asl2 %0\;asl2 %0\";
   return \"and %2,%0\";
 }"
-  [(set_attr "cc" "none_0hit,set_zn_c0")])
+  [(set_attr "cc" "none_0hit,set_znv")])
 
 ;; ----------------------------------------------------------------------
 ;; OR INSTRUCTIONS
@@ -884,7 +882,7 @@
 		(match_operand:SI 2 "nonmemory_operand" "di")))]
   ""
   "or %2,%0"
-  [(set_attr "cc" "set_zn_c0")])
+  [(set_attr "cc" "set_znv")])
 
 ;; ----------------------------------------------------------------------
 ;; XOR INSTRUCTIONS
@@ -896,7 +894,7 @@
 		(match_operand:SI 2 "nonmemory_operand" "di")))]
   ""
   "xor %2,%0"
-  [(set_attr "cc" "set_zn_c0")])
+  [(set_attr "cc" "set_znv")])
 
 ;; ----------------------------------------------------------------------
 ;; NOT INSTRUCTIONS
@@ -907,7 +905,7 @@
 	(not:SI (match_operand:SI 1 "register_operand" "0")))]
   ""
   "not %0"
-  [(set_attr "cc" "set_zn_c0")])
+  [(set_attr "cc" "set_znv")])
 
 ;; -----------------------------------------------------------------
 ;; BIT FIELDS
@@ -944,7 +942,7 @@
   "@
   bclr %N1,%A0
   and %1,%0"
-  [(set_attr "cc" "clobber,set_zn_c0")])
+  [(set_attr "cc" "clobber,set_znv")])
 
 (define_insn ""
   [(set (match_operand:QI 0 "general_operand" "=R,d")
@@ -955,7 +953,7 @@
   "@
   bset %1,%A0
   or %1,%0"
-  [(set_attr "cc" "clobber")])
+  [(set_attr "cc" "clobber,set_znv")])
 
 (define_insn ""
   [(set (cc0)
@@ -982,7 +980,7 @@
   output_asm_insn (\"btst %1,%0\", xoperands);
   return \"\";
 }"
-  [(set_attr "cc" "set_zn_c0")])
+  [(set_attr "cc" "set_znv")])
 
 (define_insn ""
   [(set (cc0)
@@ -1012,14 +1010,14 @@
     output_asm_insn (\"btst %1,%A0\", xoperands);
   return \"\";
 }"
-  [(set_attr "cc" "set_zn_c0")])
+  [(set_attr "cc" "set_znv")])
 
 (define_insn ""
   [(set (cc0) (and:SI (match_operand:SI 0 "register_operand" "d")
 		      (match_operand:SI 1 "const_int_operand" "")))]
   ""
   "btst %1,%0"
-  [(set_attr "cc" "set_zn_c0")])
+  [(set_attr "cc" "set_znv")])
 
 (define_insn ""
   [(set (cc0)
@@ -1030,7 +1028,7 @@
   "@
   btst %1,%A0
   btst %1,%0"
-  [(set_attr "cc" "set_zn_c0")])
+  [(set_attr "cc" "set_znv")])
 
 
 ;; ----------------------------------------------------------------------
@@ -1326,7 +1324,7 @@
   asl2 %0\;add %0,%0
   asl2 %0\;asl2 %0
   asl %2,%0"
-  [(set_attr "cc" "set_zn_c0")])
+  [(set_attr "cc" "set_zn")])
 
 (define_insn "lshrsi3"
   [(set (match_operand:SI 0 "register_operand" "=d")
@@ -1335,7 +1333,7 @@
 	 (match_operand:QI 2 "nonmemory_operand" "di")))]
   ""
   "lsr %2,%0"
-  [(set_attr "cc" "set_zn_c0")])
+  [(set_attr "cc" "set_zn")])
 
 (define_insn "ashrsi3"
   [(set (match_operand:SI 0 "register_operand" "=d")
@@ -1344,7 +1342,7 @@
 	 (match_operand:QI 2 "nonmemory_operand" "di")))]
   ""
   "asr %2,%0"
-  [(set_attr "cc" "set_zn_c0")])
+  [(set_attr "cc" "set_zn")])
 
 ;; ----------------------------------------------------------------------
 ;; PROLOGUE/EPILOGUE