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authorRainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>2020-06-29 11:51:07 +0200
committerRainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>2020-06-29 11:51:07 +0200
commitceac3edb42e1090be8cee895a5659fe847a4050a (patch)
treef8b72375fa22ee2d03566e2a6250633b8e0790c0 /gcc
parent4494fcbc9bc887de7e428386a5dee3bc21622b6c (diff)
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sparc: Remove register storage class in sparc.c
The switch to C++17 broke SPARC bootstrap: /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c:8887:34: error: ISO C++17 does not allow 'register' storage class specifier [-Werror=register] 8887 | epilogue_renumber (register rtx *where, int test) | ^~~~~ /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c: In function 'int epilogue_renumber(rtx_def**, int)': /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c:8889:24: error: ISO C++17 does not allow 'register' storage class specifier [-Werror=register] 8889 | register const char *fmt; | ^~~ /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c:8890:16: error: ISO C++17 does not allow 'register' storage class specifier [-Werror=register] 8890 | register int i; | ^ /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c:8891:26: error: ISO C++17 does not allow 'register' storage class specifier [-Werror=register] 8891 | register enum rtx_code code; | ^~~~ /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c:8948:17: error: ISO C++17 does not allow 'register' storage class specifier [-Werror=register] 8948 | register int j; | ^ /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c: In function 'void sparc_print_operand_address(std::FILE*, machine_mode, rtx)': /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c:9671:16: error: ISO C++17 does not allow 'register' storage class specifier [-Werror=register] 9671 | register rtx base, index = 0; | ^~~~ /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c:9671:22: error: ISO C++17 does not allow 'register' storage class specifier [-Werror=register] 9671 | register rtx base, index = 0; | ^~~~~ /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c:9673:16: error: ISO C++17 does not allow 'register' storage class specifier [-Werror=register] 9673 | register rtx addr = x; | ^~~~ /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c: At global scope: /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c:9807:32: error: ISO C++17 does not allow 'register' storage class specifier [-Werror=register] 9807 | sparc_type_code (register tree type) | ^~~~ /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c: In function 'long unsigned int sparc_type_code(tree)': /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c:9809:26: error: ISO C++17 does not allow 'register' storage class specifier [-Werror=register] 9809 | register unsigned long qualifiers = 0; | ^~~~~~~~~~ /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c:9810:21: error: ISO C++17 does not allow 'register' storage class specifier [-Werror=register] 9810 | register unsigned shift; | ^~~~~ /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c: In function 'int set_extends(rtx_insn*)': /vol/gcc/src/hg/master/local/gcc/config/sparc/sparc.c:10306:16: error: ISO C++17 does not allow 'register' storage class specifier [-Werror=register] 10306 | register rtx pat = PATTERN (insn); | ^~~ Fixed by removing the register keyword. Bootstrapped on sparc-sun-solaris2.11. * config/sparc/sparc.c (epilogue_renumber): Remove register. (sparc_print_operand_address): Likewise. (sparc_type_code): Likewise. (set_extends): Likewise.
Diffstat (limited to 'gcc')
-rw-r--r--gcc/config/sparc/sparc.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index aefced8..2780b42 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -8884,11 +8884,11 @@ output_v9branch (rtx op, rtx dest, int reg, int label, int reversed,
*/
static int
-epilogue_renumber (register rtx *where, int test)
+epilogue_renumber (rtx *where, int test)
{
- register const char *fmt;
- register int i;
- register enum rtx_code code;
+ const char *fmt;
+ int i;
+ enum rtx_code code;
if (*where == 0)
return 0;
@@ -8945,7 +8945,7 @@ epilogue_renumber (register rtx *where, int test)
{
if (fmt[i] == 'E')
{
- register int j;
+ int j;
for (j = XVECLEN (*where, i) - 1; j >= 0; j--)
if (epilogue_renumber (&(XVECEXP (*where, i, j)), test))
return 1;
@@ -9668,9 +9668,9 @@ sparc_print_operand (FILE *file, rtx x, int code)
static void
sparc_print_operand_address (FILE *file, machine_mode /*mode*/, rtx x)
{
- register rtx base, index = 0;
+ rtx base, index = 0;
int offset = 0;
- register rtx addr = x;
+ rtx addr = x;
if (REG_P (addr))
fputs (reg_names[REGNO (addr)], file);
@@ -9804,10 +9804,10 @@ sparc_assemble_integer (rtx x, unsigned int size, int aligned_p)
#endif
unsigned long
-sparc_type_code (register tree type)
+sparc_type_code (tree type)
{
- register unsigned long qualifiers = 0;
- register unsigned shift;
+ unsigned long qualifiers = 0;
+ unsigned shift;
/* Only the first 30 bits of the qualifier are valid. We must refrain from
setting more, since some assemblers will give an error for this. Also,
@@ -10303,7 +10303,7 @@ sparc_branch_cost (bool speed_p, bool predictable_p)
static int
set_extends (rtx_insn *insn)
{
- register rtx pat = PATTERN (insn);
+ rtx pat = PATTERN (insn);
switch (GET_CODE (SET_SRC (pat)))
{