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authorRamana Radhakrishnan <ramana.radhakrishnan@arm.com>2009-06-19 21:22:44 +0000
committerRamana Radhakrishnan <ramana@gcc.gnu.org>2009-06-19 21:22:44 +0000
commitce41c38bfcb5f4f45791fd13b52dcd687834c818 (patch)
tree984352a3384c1c85751c41fc88bf7dca7027c364 /gcc
parentd130ae115657aa4e4c4dab6e56f3c08d44bcdfa8 (diff)
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Fix PR 40482 2009-06-19 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Fix PR 40482 2009-06-19 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> PR target/40482 * config/arm/arm.c (thumb_shiftable_const): Truncate val to 32 bits. * config/arm/arm.md: Likewise. 2009-06-19 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> PR target/40482 * gcc.target/arm/pr40482.c: New test. From-SVN: r148728
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/config/arm/arm.c1
-rw-r--r--gcc/config/arm/arm.md2
-rw-r--r--gcc/testsuite/ChangeLog5
-rw-r--r--gcc/testsuite/gcc.target/arm/pr40482.c7
5 files changed, 21 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6b76ed3..8de4e56 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2009-06-19 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+
+ PR target/40482
+ * config/arm/arm.c (thumb_shiftable_const): Truncate val to
+ 32 bits.
+ * config/arm/arm.md: Likewise.
+
2009-06-19 Ian Lance Taylor <ian@airs.com>
* tree-cfg.c (gimple_redirect_edge_and_branch): Change ERROR_MARK
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index a51cbb1..b629794 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -17515,6 +17515,7 @@ thumb_shiftable_const (unsigned HOST_WIDE_INT val)
unsigned HOST_WIDE_INT mask = 0xff;
int i;
+ val = val & (unsigned HOST_WIDE_INT)0xffffffffu;
if (val == 0) /* XXX */
return 0;
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index fc2ce3c9..0f04e46 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -5166,7 +5166,7 @@
(set (match_dup 0) (ashift:SI (match_dup 0) (match_dup 2)))]
"
{
- unsigned HOST_WIDE_INT val = INTVAL (operands[1]);
+ unsigned HOST_WIDE_INT val = INTVAL (operands[1]) & 0xffffffffu;
unsigned HOST_WIDE_INT mask = 0xff;
int i;
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 4a1a8d3..e7621a7 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2009-06-19 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+
+ PR target/40482
+ * gcc.target/arm/pr40482.c: New test.
+
2009-06-19 Ian Lance Taylor <iant@google.com>
* gcc.dg/Wcxx-compat-18.c: New testcase.
diff --git a/gcc/testsuite/gcc.target/arm/pr40482.c b/gcc/testsuite/gcc.target/arm/pr40482.c
new file mode 100644
index 0000000..4303a4f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr40482.c
@@ -0,0 +1,7 @@
+/* { dg-options "-mthumb -Os" } */
+/* { dg-final { scan-assembler-not "ldr" } } */
+
+unsigned int foo (unsigned int i )
+{
+ return i | 0xff000000;
+}