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| author | Hartmut Penner <hpenner@de.ibm.com> | 2004-01-08 07:25:56 +0000 |
|---|---|---|
| committer | Hartmut Penner <hpenner@gcc.gnu.org> | 2004-01-08 07:25:56 +0000 |
| commit | ce1f50b212408a151c9171eb0ac9c5ef0ac10439 (patch) | |
| tree | 8070be9e9dd4f29c408ab94529e8246bf9df6c2a /gcc | |
| parent | 11e584edfe93b8c03e5353739f790909d1f8ae9d (diff) | |
| download | gcc-ce1f50b212408a151c9171eb0ac9c5ef0ac10439.zip gcc-ce1f50b212408a151c9171eb0ac9c5ef0ac10439.tar.gz gcc-ce1f50b212408a151c9171eb0ac9c5ef0ac10439.tar.bz2 | |
rs6000.c (easy_vector_constant): Accept all vector constant loadable by vsplt*.
* gcc/config/rs6000/rs6000.c (easy_vector_constant): Accept
all vector constant loadable by vsplt*.
(output_vec_const_move): Likewise.
From-SVN: r75534
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.c | 49 |
2 files changed, 47 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9ceffd9..96e10ab 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2004-01-08 Hartmut Penner <hpenner@de.ibm.com> + + * gcc/config/rs6000/rs6000.c (easy_vector_constant): Accept + all vector constant loadable by vsplt*. + (output_vec_const_move): Likewise. + 2004-01-07 Joseph S. Myers <jsm@polyomino.org.uk> PR c/6024 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index bda0777..bef470f 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -1676,8 +1676,27 @@ easy_vector_constant (rtx op, enum machine_mode mode) && cst2 >= -0x7fff && cst2 <= 0x7fff) return 1; - if (TARGET_ALTIVEC && EASY_VECTOR_15 (cst, op, mode)) - return 1; + if (TARGET_ALTIVEC) + switch (mode) + { + case V4SImode: + if (EASY_VECTOR_15 (cst, op, mode)) + return 1; + if ((cst & 0xffff) != ((cst >> 16) & 0xffff)) + break; + cst = cst >> 16; + case V8HImode: + if (EASY_VECTOR_15 (cst, op, mode)) + return 1; + if ((cst & 0xff) != ((cst >> 8) & 0xff)) + break; + cst = cst >> 8; + case V16QImode: + if (EASY_VECTOR_15 (cst, op, mode)) + return 1; + default: + break; + } if (TARGET_ALTIVEC && EASY_VECTOR_15_ADD_SELF (cst, op, mode)) return 1; @@ -1718,23 +1737,37 @@ output_vec_const_move (rtx *operands) { if (zero_constant (vec, mode)) return "vxor %0,%0,%0"; - else if (EASY_VECTOR_15 (cst, vec, mode)) + else if (EASY_VECTOR_15_ADD_SELF (cst, vec, mode)) + return "#"; + else if (easy_vector_constant (vec, mode)) { operands[1] = GEN_INT (cst); switch (mode) { case V4SImode: - return "vspltisw %0,%1"; + if (EASY_VECTOR_15 (cst, vec, mode)) + { + operands[1] = GEN_INT (cst); + return "vspltisw %0,%1"; + } + cst = cst >> 16; case V8HImode: - return "vspltish %0,%1"; + if (EASY_VECTOR_15 (cst, vec, mode)) + { + operands[1] = GEN_INT (cst); + return "vspltish %0,%1"; + } + cst = cst >> 8; case V16QImode: - return "vspltisb %0,%1"; + if (EASY_VECTOR_15 (cst, vec, mode)) + { + operands[1] = GEN_INT (cst); + return "vspltisb %0,%1"; + } default: abort (); } } - else if (EASY_VECTOR_15_ADD_SELF (cst, vec, mode)) - return "#"; else abort (); } |